Analog Devices Inc. AD9230BCPZ-170
- Part No.:
- AD9230BCPZ-170
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 56-VFQFN Exposed Pad, CSP
- Datasheet:
-
AD9230BCPZ-170.pdf
- Description:
- IC ADC 11BIT PIPELINED 56LFCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD9230BCPZ-170 from Analog Devices is a 12-bit, 170 MSPS analog-to-digital converter with LVDS outputs, 700 MHz full-power analog bandwidth, 64.3 dBFS SNR at 70 MHz input, and 1.8 V single-supply operation. It integrates track-and-hold, on-chip reference, and clock duty cycle stabilizer, targeting high-dynamic-range digitization in broadband communications infrastructure.
For engineers reviewing the AD9230BCPZ-170 datasheet, AD9230BCPZ-170 pinout, AD9230BCPZ-170 application, or AD9230BCPZ-170 equivalent, key selection criteria include sampling rate headroom (170 MSPS), SNR/SFDR trade-offs at RF input frequencies up to 170 MHz, LVDS SDR/DDR output mode configuration, and thermal performance in industrial-temperature LFCSP packaging.
Technical Context
The AD9230BCPZ-170 employs a pipelined ADC architecture with integrated track-and-hold and voltage reference, supporting differential analog inputs up to 1.5 Vp-p and programmable input range (1.0–1.5 V). Its clock input accepts CMOS/LVDS/LVPECL signals, and aperture jitter is specified at 0.2 ps rms.
Digital interface uses ANSI-644-compliant LVDS outputs with selectable data format (offset binary, twos complement, Gray code) and includes dedicated DCO± for timing-critical FPGA capture. Serial port control enables runtime configuration of power-down, gain, test patterns, and clock stabilizer enable/disable.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - delivers 4096 discrete amplitude levels for high-fidelity signal digitization. |
| Max Sampling Rate | 170 MSPS - supports Nyquist-limited baseband bandwidth up to 85 MHz without undersampling. |
| SNR @ 70 MHz | 64.3 dBFS - enables >10-bit effective resolution for wideband IF sampling in cable and wireless systems. |
| Analog Bandwidth | 700 MHz - preserves signal integrity for multi-octave RF input signals up to third Nyquist zone. |
| Power Dissipation | 383 mW (SDR mode) - balances performance and thermal load in dense PCB layouts with 56-lead LFCSP package. |
| Differential Nonlinearity | ±0.5 LSB max - ensures monotonicity and minimal code missing across full operating temperature range (−40°C to +85°C). |
| Supply Voltage | 1.8 V AVDD/DRVDD - simplifies power delivery with single low-noise rail and eliminates level-shifting requirements. |
Pinout & Package
AD9230BCPZ-170 is housed in a 56-lead, 8 mm × 8 mm LFCSP package with exposed paddle (AGND). Pinout supports LVDS SDR mode by default; DDR mode reassigns pins D0–D5 and OR–OR+ via SPI configuration.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN+, VIN− | Differential analog input | Accepts 1.0–1.5 Vp-p signal with 1.4 V common-mode; CML pin provides internal bias reference when enabled. |
| CLK+, CLK− | Differential sampling clock input | Supports LVDS/CMOS/LVPECL; internal bias sets common-mode at 1.2 V; min pulse width 2.15 ns @ 170 MSPS. |
| D0+ to D11+ | LVDS true data outputs (LSB to MSB) | ANSI-644 compliant; 247–454 mV differential swing; 7-cycle latency; SDR mode uses all 12 pairs. |
| DCO+, DCO− | Data clock output | Phase-aligned LVDS clock for synchronous capture in FPGA logic; 3.9 ns propagation delay, ±0.5 ns skew tolerance. |
| SDIO/DCS, SCLK/DFS, CSB | 3-wire SPI interface | Configures data format, power-down, test patterns, and clock stabilizer; SDIO bidirectional, CSB active-low chip select. |
| PWDN, RESET | Control inputs | PWDN asserts low-power state (<10 μA); RESET initializes internal logic and clears serial interface registers. |
Key Features
| Feature | Design Value |
|---|---|
| On-chip voltage reference | Eliminates external reference IC and decoupling components, reducing BOM count and layout sensitivity. |
| Programmable input voltage range | 1.0 V to 1.5 V p-p via SPI register, enabling optimization for varying signal chain gain distribution. |
| LVDS DDR/SDR mode selection | Reduces output pin count by 50% in DDR mode (6 pins carry 12 bits), easing FPGA I/O resource constraints. |
| Integrated clock duty cycle stabilizer | Compensates for asymmetric clock edges, maintaining sampling aperture accuracy without external correction circuitry. |
| Serial port configurability | Enables runtime adjustment of gain, offset, test patterns, and power modes-critical for adaptive receiver calibration. |
Applications
| Cable Reverse Path Acquisition | Communications Test Equipment |
|---|---|
Use Scenario: Digitizing upstream DOCSIS signals in cable modems and CMTS line cards with 5–85 MHz bandwidth and high SFDR requirements. IC Role / Device Role / Timing Role: High-linearity ADC front-end capturing composite QAM carriers while rejecting adjacent channel interference. Use Value: 78 dBc SFDR at 70 MHz enables accurate constellation analysis and MER measurement without external filtering. |
Use Scenario: Signal acquisition in vector signal analyzers and arbitrary waveform generators requiring wide dynamic range and low noise floor. IC Role / Device Role / Timing Role: Precision digitizer for real-time spectral analysis and modulation error ratio (MER) computation. Use Value: 64.3 dBFS SNR and <0.5 LSB INL support sub-0.1% EVM measurements at 64-QAM and higher constellations. |
| Radar IF Digitization | Power Amplifier Linearization |
Use Scenario: Intermediate frequency sampling in pulsed radar receivers where phase coherence and spurious-free performance are critical. IC Role / Device Role / Timing Role: Wideband ADC capturing chirped IF signals with minimal group delay variation across 700 MHz bandwidth. Use Value: 0.2 ps rms aperture jitter preserves phase integrity for coherent beamforming and Doppler processing. |
Use Scenario: Capturing PA output for digital predistortion (DPD) feedback loops in LTE/5G base stations. IC Role / Device Role / Timing Role: High-speed feedback path ADC synchronizing with transmit DAC to compute real-time correction coefficients. Use Value: 170 MSPS sampling and 7-cycle fixed latency enable closed-loop DPD update rates up to 24 MSPS. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9230BCPZ-210 | Higher max sample rate (210 MSPS); identical pinout, package, and feature set. | Required for systems needing >170 MSPS bandwidth or oversampling headroom. | Select when system clocking allows 210 MSPS operation and SNR degradation above 140 MHz is acceptable. |
| AD9226ASTZ | 12-bit, 65 MSPS; CMOS outputs; no on-chip reference; requires external REF and separate analog/digital supplies. | Suitable for cost-sensitive, lower-bandwidth applications where LVDS and integration are not required. | Choose only for legacy designs with existing CMOS FPGA interfaces and relaxed dynamic performance requirements. |
Compared with AD9230BCPZ-210, the AD9230BCPZ-170 offers lower power (383 mW vs. 434 mW) and better SFDR stability at 70–140 MHz, while AD9226ASTZ lacks integrated reference and LVDS, increasing board area and supply complexity despite lower unit cost.
Availability
AD9230BCPZ-170 is available at Aetrix Electronics and suitable for cable infrastructure, radar subsystems, and test equipment requiring stable component supply, industrial-temperature operation, and long-term obsolescence management.
Supply support for AD9230BCPZ-170 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The AD9230 product line delivers high-speed, low-power ADCs optimized for wideband communications, instrumentation, and defense applications-emphasizing dynamic performance, integration, and ease of FPGA interfacing.
FAQ
What is the maximum analog input frequency supported by the AD9230BCPZ-170?
The AD9230BCPZ-170 features a 700 MHz full-power analog bandwidth, allowing accurate digitization of signals up to 700 MHz in the first or higher Nyquist zones. At 170 MSPS sampling, its usable input spectrum extends beyond 170 MHz, making it suitable for undersampling applications such as IF sampling in communications receivers. Performance metrics like SNR and SFDR are validated up to 170 MHz per datasheet Table 2.
Does the AD9230BCPZ-170 require an external reference voltage?
No, the AD9230BCPZ-170 includes a fully integrated voltage reference and does not require external decoupling capacitors or reference ICs. The on-chip reference supports the nominal 1.25 V p-p full-scale input range and is factory-trimmed for accuracy. Users may optionally configure the input range between 1.0 V and 1.5 V p-p via the SPI interface without modifying external circuitry.
How is the AD9230BCPZ-170 configured for LVDS DDR versus SDR output mode?
The AD9230BCPZ-170 defaults to LVDS SDR mode. DDR mode is enabled via SPI register write (address 0x08, bit D0 = 1), which reconfigures pins D0–D5 and OR+/OR− to carry time-multiplexed 12-bit data. In DDR mode, D0+/D0− transmit both LSB and D6 bits per clock edge, halving the required LVDS lane count while maintaining full 12-bit resolution and 170 MSPS throughput.
What is the power consumption of the AD9230BCPZ-170 at 170 MSPS?
At 170 MSPS, the AD9230BCPZ-170 consumes 383 mW in LVDS SDR mode (IAVDD = 154 mA, IDRVDD = 60 mA) and 349 mW in LVDS DDR mode (IAVDD = 154 mA, IDRVDD = 59 mA), both measured with 1.8 V AVDD and DRVDD supplies. Power scales linearly with sample rate down to 40 MSPS, enabling dynamic power management in burst-mode systems.
Can the AD9230BCPZ-170 operate over the full industrial temperature range?
Yes, the AD9230BCPZ-170 is fully specified and guaranteed over the industrial temperature range of −40°C to +85°C. All AC and DC specifications-including SNR, SFDR, INL, DNL, and power supply current-are tested and bounded across this range. Thermal resistance (θJA = 30.4°C/W) assumes proper soldering of the exposed paddle to the PCB ground plane.
AD9230BCPZ-170 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 56-VFQFN Exposed Pad, CSP
- Packaging:
- Tray
- Product Status:
- Active
- Number of Bits:
- 11
- Sampling Rate (Per Second):
- 200M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- LVDS - Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 56-LFCSP-VQ (8x8)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD9230BCPZ-170 FAQ
1.How can I place an order for AD9230BCPZ-170 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9230BCPZ-170 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9230BCPZ-170 reliable?
The price and inventory of AD9230BCPZ-170 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9230BCPZ-170 is usually 5 days.
3.What payment methods are accepted for AD9230BCPZ-170?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9230BCPZ-170 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9230BCPZ-170?
AD9230BCPZ-170 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9230BCPZ-170 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9230BCPZ-170?
For technical support, including AD9230BCPZ-170 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9230BCPZ-170 requirements.
6.How does Aetrix verify that AD9230BCPZ-170 is sourced from the original manufacturer or authorized distributors?
All AD9230BCPZ-170 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9230BCPZ-170 meets industry standards.
7.What is the process for return or replacement of AD9230BCPZ-170?
All AD9230BCPZ-170 units undergo pre-shipment inspection (PSI). If there is an issue with AD9230BCPZ-170, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9230BCPZ-170 part is unused and in its original packaging.
Return procedure for AD9230BCPZ-170:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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