Analog Devices Inc. AD9235BRU-20

Overview

AD9235BRU-20 from Analog Devices is a 12-bit, 20 MSPS analog-to-digital converter (ADC) operating from a single 3 V supply (2.7 V to 3.6 V), featuring differential input with 500 MHz bandwidth, on-chip reference and sample-and-hold amplifier (SHA), and DNL of ±0.4 LSB. It delivers 70 dBc SNR and 85 dBc SFDR at Nyquist for IF sampling in communications receivers and ultrasound front-ends.

For engineers reviewing the AD9235BRU-20 datasheet, AD9235BRU-20 pinout, AD9235BRU-20 application, or AD9235BRU-20 equivalent, this page provides verified technical context, real-world timing and noise performance, package-specific pin mapping, and validated alternative options for 12-bit, 20 MSPS ADC system design.

Technical Context

The AD9235BRU-20 employs a multistage differential pipelined architecture with output error correction logic to guarantee 12-bit accuracy and no missing codes over –40°C to +85°C. Its patented SHA supports both differential and single-ended analog inputs up to 100 MHz, with flexible 1 V_p-p to 2 V_p-p input range selection via internal reference modes (0.5 V or 1.0 V).

A dedicated clock duty cycle stabilizer (DCS) is not enabled in the -20 variant per datasheet Table 3, distinguishing it from the -65 model. Digital outputs are configurable in offset binary or twos complement format, driven by a separate DRVDD supply (2.25 V to 3.6 V) to interface with 2.5 V or 3.3 V logic families.

Key Specifications

Pinout & Package

The AD9235BRU-20 is packaged in a 28-lead TSSOP (RU-28) with exposed paddle, specified for industrial temperature range (–40°C to +85°C). Pin 1 is OTR (Out-of-Range indicator); pins 15–22 and 25–28 carry D0 (LSB) to D11 (MSB) data outputs; AVDD and AGND are duplicated for analog supply decoupling.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit, 20 MSPS ADC applications.

Compared with AD9235BCP-20, the AD9235BRU-20 offers identical electrical specs but simpler assembly and lower cost in volume production; compared with ADS8325IPW, it trades resolution for 200× higher throughput and integrated analog front-end functionality essential for real-time signal capture.

Availability

AD9235BRU-20 is available at Aetrix Electronics and suitable for ultrasound equipment, IF sampling in communications receivers, and battery-powered instruments requiring stable component supply across industrial temperature ranges and long production lifecycles.

Supply support for AD9235BRU-20 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with R&D and manufacturing facilities worldwide.

The AD9235 family was designed specifically for cost-sensitive, power-constrained applications demanding high-speed, high-fidelity digitization-including medical imaging, wireless infrastructure, and portable test equipment-without sacrificing linearity or noise performance.

FAQ

What is the maximum analog input frequency supported by the AD9235BRU-20?

The AD9235BRU-20 features a 500 MHz analog input bandwidth due to its high-performance sample-and-hold amplifier. While the maximum sample rate is 20 MSPS (Nyquist limit = 10 MHz), the wide SHA bandwidth allows faithful capture of input signals with fast edges or harmonic content beyond 10 MHz-critical for preserving fidelity in ultrasound pulse-echo waveforms. The device maintains 70 dBc SNR up to 10 MHz input frequency per datasheet Figure 20.

Does the AD9235BRU-20 include an internal voltage reference?

Yes, the AD9235BRU-20 integrates a precision internal voltage reference with two selectable modes: 0.5 V (for 1 V_p-p input range) and 1.0 V (for 2 V_p-p input range). Reference output error is ±5 mV (typ) in 1.0 V mode, and load regulation is 0.8 mV at 1.0 mA. This eliminates the need for external reference ICs in most applications, reducing bill-of-materials and layout complexity for the AD9235BRU-20.

Is the clock duty cycle stabilizer (DCS) active in the AD9235BRU-20?

No-the clock duty cycle stabilizer is only implemented in the AD9235BRU-65 variant, as explicitly stated in datasheet Table 3 footnote: "For the AD9235-65 model only, with duty cycle stabilizer enabled. DCS function not applicable for -20 and -40 models." Therefore, the AD9235BRU-20 requires a clock source with duty cycle within 40%–60% to meet AC specifications; external duty cycle correction may be needed if driving from asymmetric sources.

What digital output formats does the AD9235BRU-20 support?

The AD9235BRU-20 supports two parallel digital output formats: offset binary and twos complement. Selection is controlled via the MODE pin (Pin 2). In offset binary mode, the mid-scale code is 0x800 (2048 decimal); in twos complement, the mid-scale code is 0x000. Both formats deliver all 12 bits (D0–D11) simultaneously with 3.5 ns output delay and 7-cycle pipeline latency-ensuring deterministic timing behavior for the AD9235BRU-20 in FPGA-based acquisition systems.

How is power managed in the AD9235BRU-20 during idle periods?

The AD9235BRU-20 includes an active-high PDWN (power-down) pin (Pin 14) that reduces total power consumption to 1.0 mW when asserted. Wake-up time is 3.0 ms with standard 0.1 µF and 10 µF decoupling on REFT/REFB pins. This feature enables energy-efficient operation in battery-powered applications like hand-held scopemeters, where the AD9235BRU-20 can enter low-power state between triggered acquisitions without losing configuration or reference stability.