Analog Devices Inc. AD9235BRU-65

Overview

AD9235BRU-65 from Analog Devices is a 12-bit, 65 MSPS monolithic analog-to-digital converter (ADC) with integrated sample-and-hold amplifier (SHA), on-chip voltage reference, and clock duty cycle stabilizer (DCS). It operates from a single 3 V supply (2.7 V to 3.6 V), delivers 70 dBc SNR and 85 dBc SFDR at Nyquist, consumes 300 mW, and supports differential input bandwidth up to 500 MHz - enabling high-fidelity IF sampling in communications receivers and ultrasound front-ends.

For engineers reviewing the AD9235BRU-65 datasheet, AD9235BRU-65 pinout, AD9235BRU-65 application, or AD9235BRU-65 equivalent, this page provides verified technical context, exact pin functions, real-world use cases in medical imaging and wireless infrastructure, and validated alternative parts for design flexibility and supply continuity.

Technical Context

The AD9235BRU-65 employs a multistage differential pipelined architecture with output error correction logic to guarantee 12-bit accuracy and no missing codes over –40°C to +85°C. Its patented SHA supports both differential and single-ended inputs with user-selectable 1 V_p-p or 2 V_p-p ranges and maintains <±0.4 LSB DNL up to 100 MHz input frequency.

A dedicated clock duty cycle stabilizer (DCS) compensates for wide variations in input clock pulse width while preserving AC performance; digital outputs are configurable as offset binary or twos complement, with OTR (out-of-range) flag signaling overflow conditions for real-time signal monitoring.

Key Specifications

Pinout & Package

The AD9235BRU-65 is packaged in a 28-lead TSSOP (RU-28) with exposed paddle, rated for industrial temperature range (–40°C to +85°C). Pinout matches functional groupings: analog power (AVDD/AGND), digital power (DRVDD/DGND), differential analog input (VIN+/VIN–), reference interface (VREF/REFB/REFT/SENSE), clock and control (CLK/PDWN/MODE), and 12-bit parallel CMOS outputs (D0–D11) with OTR flag.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ADC applications.

Compared with AD9235BCP-65, the AD9235BRU-65 offers identical AC performance in a more manufacturable TSSOP package but with higher thermal resistance; versus AD9226ARSZ-65, it delivers lower power, integrated reference, and DCS - reducing BOM count and improving robustness in IF sampling systems.

Availability

AD9235BRU-65 is available at Aetrix Electronics and suitable for ultrasound imaging front-ends, IF sampling in cellular base stations, and battery-powered scopemeters requiring stable component supply and long-term production support.

Supply support for AD9235BRU-65 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, and industrial markets since 1965.

The AD9235 family was designed specifically for cost-sensitive, power-constrained high-speed digitization in medical ultrasound, wireless infrastructure, and portable test equipment - emphasizing integration, low power, and guaranteed performance across temperature.

FAQ

What is the maximum analog input frequency supported by the AD9235BRU-65?

The AD9235BRU-65 features a 500 MHz analog input bandwidth and maintains 70 dBc SNR up to 100 MHz input frequency at 65 MSPS. Its full-power bandwidth exceeds 100 MHz, making it suitable for undersampling applications where input signals lie beyond the first Nyquist zone - such as IF sampling at 45–70 MHz in CDMA receivers. Performance data confirms usable SNR down to 68.3 dBc at 100 MHz.

Does the AD9235BRU-65 require an external voltage reference?

No, the AD9235BRU-65 includes an on-chip 1.0 V or 0.5 V reference selectable via the SENSE pin. When using the internal reference, VREF serves as output; for external reference, VREF becomes input and REFB/REFT form a differential reference pair. The internal reference has ±35 mV error over temperature and supports 1 V_p-p or 2 V_p-p input spans - eliminating need for external references in most applications.

How does the clock duty cycle stabilizer (DCS) function in the AD9235BRU-65?

The DCS in the AD9235BRU-65 actively corrects input clock duty cycle deviations, maintaining full AC performance across 30%–70% duty cycle - unlike the -20 and -40 variants where DCS is not implemented. Enabled via the MODE pin, DCS ensures aperture jitter remains ≤0.5 ps rms even with highly asymmetric clocks, which is critical for stable SNR/SFDR in IF sampling systems where clock sources may lack tight duty cycle control.

What is the purpose of the OTR (out-of-range) pin on the AD9235BRU-65?

The OTR pin on the AD9235BRU-65 is an active-high flag indicating when the analog input exceeds the selected full-scale range - either positive or negative saturation. Used alongside the MSB, it enables unambiguous detection of overflow direction without post-processing. In real-time systems like ultrasound AGC or oscilloscope auto-ranging, OTR allows immediate gain adjustment within one pipeline latency (7 cycles), preventing data corruption during transient overloads.

Can the AD9235BRU-65 operate with a 2.5 V digital supply while using a 3.0 V analog supply?

Yes, the AD9235BRU-65 supports independent analog and digital supplies: AVDD (2.7–3.6 V) powers the analog core and SHA, while DRVDD (2.25–3.6 V) drives the 12-bit CMOS digital outputs. Using DRVDD = 2.5 V enables direct interfacing with 2.5 V logic families (e.g., Spartan-6 FPGA I/O banks), while AVDD = 3.0 V ensures optimal analog performance. Decoupling each supply to its respective ground (AGND/DGND) with 0.1 µF + 10 µF capacitors is mandatory per datasheet guidelines.