Analog Devices Inc. AD9236BRURL7-80

Overview

AD9236BRURL7-80 from Analog Devices is a 12-bit, 80 MSPS analog-to-digital converter operating from a single 3 V supply (2.7–3.6 V), featuring differential input with 500 MHz analog bandwidth, on-chip reference and sample-and-hold, and clock duty cycle stabilizer. It delivers SNR = 70.4 dBc and SFDR = 87.8 dBc at 40 MHz input, targeting IF sampling in communications receivers and medical ultrasound systems.

For engineers reviewing the AD9236BRURL7-80 datasheet, AD9236BRURL7-80 pinout, AD9236BRURL7-80 application, or AD9236BRURL7-80 equivalent, this page provides verified technical context, real-world timing and noise performance data, package-specific pin mapping, and validated alternative options for high-speed data acquisition designs requiring stable 12-bit resolution at 80 MSPS.

Technical Context

The AD9236BRURL7-80 implements a multistage differential pipelined architecture with 4-bit first stage, eight 1.5-bit stages, and final 3-bit flash ADC, incorporating output error correction logic to guarantee no missing codes across –40°C to +85°C. Its patented differential SHA supports both ac- and dc-coupled inputs with configurable common-mode voltage and flexible 1 V_p-p to 2 V_p-p input range.

It uses a single-ended clock input with integrated duty cycle stabilizer (DCS) to maintain SNR ≥ 70 dBc and SFDR ≥ 87 dBc over wide clock duty cycle variation. Digital outputs are CMOS-compatible, driven by separate DRVDD supply (2.25–3.6 V) supporting 2.5 V or 3.3 V logic families, with pipeline latency of 7 clock cycles and aperture jitter of 0.3 ps rms.

Key Specifications

Pinout & Package

The AD9236BRURL7-80 is packaged in a 28-lead TSSOP (RU-28) with exposed paddle not present; pin functions are electrically identical to AD9236BRU variant per datasheet Rev. C.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ADC applications.

Compared with AD9235BRU-80 and AD9245BCPZ-80, the AD9236BRURL7-80 delivers superior SFDR at full speed, lower power than the 14-bit AD9245, and guaranteed 80 MSPS operation over industrial temperature-making it the preferred choice for portable and communications-grade digitizers.

Availability

AD9236BRURL7-80 is available at Aetrix Electronics and suitable for IF sampling in communications receivers, medical ultrasound beamforming, and battery-powered handheld scopemeters requiring stable component supply and long-term production continuity.

Supply support for AD9236BRURL7-80 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with R&D and manufacturing infrastructure spanning North America, Europe, and Asia.

The AD9236 belongs to Analog Devices' high-speed data converter product line, designed specifically for demanding communications, medical imaging, and instrumentation applications requiring precision, speed, and low power in a single-supply architecture.

FAQ

What is the maximum analog input frequency supported by the AD9236BRURL7-80?

The AD9236BRURL7-80 features a 500 MHz analog input bandwidth, enabling accurate digitization of signals up to 100 MHz while maintaining specified SNR and SFDR performance. At 70 MHz input, it achieves 67.8 dBc SNR and 73.2 dBc SFDR per datasheet Rev. C, making it suitable for undersampling applications such as IF digitization in wireless receivers.

Does the AD9236BRURL7-80 require an external reference, or does it include an internal one?

The AD9236BRURL7-80 integrates an internal voltage reference that can be configured for 1.0 V or 0.5 V output via the SENSE pin. It also supports external differential reference inputs (REFT/REFB) for improved accuracy and noise rejection. The internal reference exhibits ±35 mV output voltage error over temperature, eliminating the need for external components in cost-sensitive designs.

How does the clock duty cycle stabilizer (DCS) affect the performance of the AD9236BRURL7-80?

The DCS in the AD9236BRURL7-80 actively corrects clock duty cycle deviations, preserving SNR ≥ 70 dBc and SFDR ≥ 87 dBc even with 40–60% duty cycle variation. Without DCS enabled, SNR degrades by up to 1.5 dB and SFDR drops by ~6 dB at extreme duty cycles-critical for systems using non-50% clocks from FPGAs or PLLs.

What is the pipeline latency of the AD9236BRURL7-80, and how does it impact system synchronization?

The AD9236BRURL7-80 has a fixed pipeline latency of 7 clock cycles from sample initiation (CLK rising edge) to valid D0–D11 output. This deterministic delay enables precise timing alignment in FPGA-based digital downconverters and real-time control loops, provided the latency is accounted for in system-level timing budgets and buffer management.

Can the AD9236BRURL7-80 operate with a 2.5 V digital supply while using a 3 V analog supply?

Yes-the AD9236BRURL7-80 supports independent analog (AVDD = 2.7–3.6 V) and digital output driver (DRVDD = 2.25–3.6 V) supplies. With AVDD = 3.0 V and DRVDD = 2.5 V, it delivers guaranteed 2.45 V high-level output and 0.2 V low-level output, ensuring reliable interfacing with 2.5 V FPGA I/O banks without level shifters.