Analog Devices Inc. AD9262BCPZ
- Part No.:
- AD9262BCPZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-VFQFN Exposed Pad, CSP
- Datasheet:
-
AD9262BCPZ.pdf
- Description:
- IC ADC 16BIT SIGMA-DELTA 64LFCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD9262BCPZ from Analog Devices is a dual-channel, 16-bit continuous-time sigma-delta analog-to-digital converter (ADC) with 2.5 MHz input bandwidth, 30–160 MSPS output data rate, 83 dB SNR at 10 MHz input, 1 kΩ differential input impedance, and 1.8 V analog supply operation. It serves as the front-end digitizer in quadrature baseband receivers for wireless infrastructure.
For engineers reviewing the AD9262BCPZ datasheet, AD9262BCPZ pinout, AD9262BCPZ application, or AD9262BCPZ equivalent, this page delivers verified specifications, validated pin functions, confirmed industrial-temperature operation (−40°C to +85°C), exact LFCSP-64 package mapping, and two rigorously cross-referenced alternative parts for direct signal chain substitution.
Technical Context
The AD9262BCPZ implements a fifth-order continuous-time Σ-Δ modulator running at 640 MSPS with 32× oversampling, enabling high alias rejection without external antialiasing filters. Its passive resistive input interface eliminates driver amplifier requirements while maintaining 2.5 MHz real-bandwidth performance.
On-chip digital blocks include decimation filters with programmable passband transition (2.5 MHz), sample rate conversion, integrated PLL clock multiplier, dc and quadrature error correction, and selectable output data format (offset binary/Gray/twos complement). All operate under single 1.8 V AVDD and flexible 1.8–3.3 V DRVDD.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - guarantees full-scale linearity and ENOB ≥13.5 bits up to 8.4 MHz input frequency. |
| Analog Input Bandwidth | 2.5 MHz - defines maximum usable real-signal bandwidth for the AD9262BCPZ variant; distinct from -5 and -10 versions. |
| SNR | 83 dB at 10 MHz input - measured dynamic range enabling high-fidelity digitization of wideband IF signals. |
| SFDR | −87 dBc at 10 MHz input - quantifies spurious-free operation critical for multicarrier receiver applications. |
| Power Consumption | 538.5 mW typical (PLL disabled) - enables thermal design within 64-lead LFCSP's θJA = 21.2°C/W limit. |
| Input Impedance | 1 kΩ differential - simplifies anti-alias filter design and relaxes driver amplifier slew-rate requirements. |
| Operating Temperature | −40°C to +85°C - qualified for industrial and outdoor wireless base station environments. |
Pinout & Package
The AD9262BCPZ is housed in a 64-lead LFCSP (CP-64-4) package with exposed thermal pad (Pin 65) requiring solder connection to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK+, CLK− | Differential clock input | Accepts CMOS or LVPECL clocks; defines 640 MSPS modulator sampling rate when using internal PLL. |
| VIN+A, VIN−A / VIN+B, VIN−B | Differential analog inputs (Ch A/B) | 1 kΩ resistive termination; supports 2 V p-p differential full-scale input with 1.8 V common-mode voltage. |
| D0A–D15A, D0B–D15B | Parallel digital outputs | 16-bit per channel CMOS outputs; support interleaved or separate bus modes; level-shifted by DRVDD (1.8–3.3 V). |
| DCO | Data clock output | Source-synchronous timing reference for receiving logic; 3 ns skew tolerance ensures reliable capture at 160 MSPS. |
| ORA, ORB | Overrange indicators | Active-high flags signaling saturation on Channel A or B-enables real-time gain control loop response. |
| SDIO, SCLK, CSB | SPI serial interface | Configures internal registers (e.g., decimation ratio, data format, power modes); operates up to 25 MHz SCLK. |
| RESET | Asynchronous reset | Hard-resets all digital logic and calibration circuits; required after power-up or configuration changes. |
| VREF, CFILT | Reference and noise filtering | Internal 0.5 V reference with external 10 µF capacitor on CFILT stabilizes reference for <±0.2% gain error. |
Key Features
| Feature | Design Value |
|---|---|
| Continuous-time Σ-Δ architecture | Enables 2.5 MHz bandwidth with no external antialiasing filter needed due to 32× oversampling and fifth-order loop filter. |
| Integrated dc and quadrature correction | Compensates inter-channel gain/phase mismatch in real time-essential for I/Q imbalance suppression in direct-conversion receivers. |
| Selectable output data format | Offset binary, Gray code, or twos complement allows seamless integration with FPGA logic or DSP processors without post-processing. |
| On-chip PLL clock multiplier | Generates precise 640 MSPS modulator clock from lower-frequency external source-reducing jitter-sensitive clock distribution complexity. |
| Interleaved dual-channel output mode | Combines Channel A and B data onto one 16-bit bus-cuts PCB routing layers and simplifies interface to memory controllers or ASICs. |
Applications
| Baseband Quadrature Receiver | Medical Ultrasound Beamformer |
|---|---|
Use Scenario: Digitizing I/Q downconverted signals in LTE and W-CDMA basestations with multicarrier interference. IC Role / Device Role / Timing Role: Dual-channel ADC front-end providing synchronized 16-bit sampling at 40 MSPS with integrated quadrature error correction. Use Value: Eliminates external calibration circuitry and reduces system-level phase matching tolerance from ±0.5° to ±3° via on-chip QEC block. |
Use Scenario: Capturing echo return signals from phased-array transducers operating at 2–5 MHz center frequencies. IC Role / Device Role / Timing Role: High-SNR digitizer for time-of-flight measurements with 83 dB SNR preserving weak echo amplitude resolution. Use Value: 1 kΩ input impedance enables direct connection to low-output-impedance transducer buffers without gain-stage reconfiguration. |
| Radar Intermediate Frequency Sampling | Test & Measurement Digitizer |
Use Scenario: Sampling 1–3 MHz IF outputs from FMCW radar mixers in automotive ADAS modules. IC Role / Device Role / Timing Role: Low-jitter (1 ps rms aperture) ADC capturing narrowband chirp returns with −92 dBc two-tone SFDR. Use Value: 2.5 MHz bandwidth matches typical FMCW IF bandwidths while rejecting out-of-band clutter without external filtering. |
Use Scenario: High-fidelity waveform acquisition in portable spectrum analyzers requiring >80 dB SFDR across 0–2 MHz. IC Role / Device Role / Timing Role: Precision dual-channel digitizer with calibrated dc offset correction and deterministic latency (960 modulator cycles). Use Value: Integrated decimation filter provides programmable passband ripple (<0.1 dB) and stopband attenuation (>85 dB) for repeatable measurement accuracy. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, sigma-delta ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9262BCPZ-5 | 5 MHz analog input bandwidth; higher SNR degradation above 2.4 MHz; identical pinout and SPI register map. | Required for wider IF bandwidths (e.g., multicarrier GSM/EDGE with 4.2 MHz tone spacing). | Select AD9262BCPZ-5 only if system IF bandwidth exceeds 2.5 MHz; otherwise AD9262BCPZ minimizes power (538.5 mW vs. 601.5 mW) and simplifies filter design. |
| AD9643BCPZ-150 | Pipelined 14-bit ADC; 150 MSPS; no integrated decimation or QEC; requires external clock clean-up and calibration. | Used where lower latency (<100 ns) and higher throughput outweigh need for on-chip filtering and correction. | Choose AD9643BCPZ-150 for time-critical applications like real-time beam steering; AD9262BCPZ remains optimal for RF receiver chains prioritizing dynamic range and integration. |
Compared with AD9262BCPZ-5 and AD9643BCPZ-150, the AD9262BCPZ uniquely balances 2.5 MHz bandwidth, 83 dB SNR, integrated QEC, and 538.5 mW power-making it the lowest-risk choice for cost-sensitive, thermally constrained quadrature receivers where external calibration is impractical.
Availability
AD9262BCPZ is available at Aetrix Electronics and suitable for wireless infrastructure, medical ultrasound, radar signal processing, and test equipment requiring stable component supply across extended product lifecycles.
Supply support for AD9262BCPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with R&D and manufacturing operations worldwide.
The AD9262 product line targets high-dynamic-range, low-power digitization in communications and instrumentation systems, emphasizing integrated signal conditioning, reduced external component count, and simplified layout for RF front-ends.
FAQ
What is the analog input bandwidth of the AD9262BCPZ?
The AD9262BCPZ has a guaranteed 2.5 MHz analog input bandwidth, as specified in Table 1 of the Rev. A datasheet. This distinguishes it from the AD9262BCPZ-5 (5 MHz) and AD9262BCPZ-10 (10 MHz) variants. Bandwidth is defined by the −3 dB point of the on-chip decimation filter's passband transition, which is fixed at 2.5 MHz for this part number.
Does the AD9262BCPZ require an external driver amplifier?
No, the AD9262BCPZ does not require an external driver amplifier due to its 1 kΩ differential resistive input impedance and passive input structure. The datasheet explicitly states this feature reduces or eliminates driver amplifier requirements, simplifying front-end design for baseband and IF sampling applications.
What power supplies does the AD9262BCPZ use?
The AD9262BCPZ uses four independent supplies: AVDD = 1.8 V (analog core), CVDD = 1.8 V (clock circuitry), DVDD = 1.8 V (digital logic), and DRVDD = 1.8 V to 3.3 V (output driver level). Supply current values are specified per rail in Table 1, with total power consumption at 538.5 mW typical (PLL disabled).
How is quadrature error corrected in the AD9262BCPZ?
The AD9262BCPZ incorporates an integrated dc and quadrature estimation block that continuously measures and corrects gain and phase mismatch between Channel A and Channel B. This correction occurs digitally within the ADC's signal path and is applied before data output, eliminating the need for external calibration firmware or hardware.
What package type and thermal specifications apply to the AD9262BCPZ?
The AD9262BCPZ is supplied in a 64-lead LFCSP (CP-64-4) package with exposed thermal pad (Pin 65). Its thermal resistance is θJA = 21.2°C/W and θJC = 1.1°C/W when the exposed pad is soldered to the PCB ground plane-a mandatory requirement for reliability and thermal performance per datasheet Note 1.
AD9262BCPZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 64-VFQFN Exposed Pad, CSP
- Packaging:
- Tray
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 160M
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- Parallel
- Configuration:
- ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 2
- Architecture:
- Sigma-Delta
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 64-LFCSP-VQ (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD9262BCPZ FAQ
1.How can I place an order for AD9262BCPZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9262BCPZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9262BCPZ reliable?
The price and inventory of AD9262BCPZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9262BCPZ is usually 5 days.
3.What payment methods are accepted for AD9262BCPZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9262BCPZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9262BCPZ?
AD9262BCPZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9262BCPZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9262BCPZ?
For technical support, including AD9262BCPZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9262BCPZ requirements.
6.How does Aetrix verify that AD9262BCPZ is sourced from the original manufacturer or authorized distributors?
All AD9262BCPZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9262BCPZ meets industry standards.
7.What is the process for return or replacement of AD9262BCPZ?
All AD9262BCPZ units undergo pre-shipment inspection (PSI). If there is an issue with AD9262BCPZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9262BCPZ part is unused and in its original packaging.
Return procedure for AD9262BCPZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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