Analog Devices Inc. AD9271BSVZ-25
- Part No.:
- AD9271BSVZ-25
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 100-TQFP Exposed Pad
- Datasheet:
-
AD9271BSVZ-25.pdf
- Description:
- IC ADC OCT 12BIT 25MSPS 100-TQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD9271BSVZ-25 from Analog Devices is an octal-channel integrated analog front-end (AFE) for ultrasound and Doppler systems, combining low-noise preamplifier (LNA), variable-gain amplifier (VGA), 3rd-order antialiasing filter (AAF), 12-bit ADC (25 MSPS), and 8×6 crosspoint switch in a single 100-lead TQFP. It delivers 1.1 nV/√Hz input-referred LNA noise, −6 dB to +24 dB VGA gain range, programmable AAF cutoff (8–18 MHz), 70 dB SNR, and LVDS serial output.
For engineers reviewing the AD9271BSVZ-25 datasheet, AD9271BSVZ-25 pinout, AD9271BSVZ-25 application, or AD9271BSVZ-25 equivalent, this device is selected for high-channel-count medical imaging transceiver chains requiring simultaneous TGC and CW Doppler signal paths with low power (150 mW/channel at 40 MSPS) and fast overload recovery (<10 ns).
Technical Context
The AD9271BSVZ-25 implements a fully differential, eight-channel signal chain optimized for time-gain compensation (TGC) in ultrasound beamforming. Each channel integrates an active-terminated LNA with SPI-selectable 14/15.6/18 dB gain, a linear-in-dB VGA with 30 dB range, and a programmable 3rd-order Butterworth AAF placed before the ADC core.
It supports dual operational modes: full TGC path (LNA→VGA→AAF→12-bit ADC) at up to 50 MSPS, and dedicated CW Doppler mode where the LNA output drives a transconductance amplifier routed through the on-chip 8×6 differential crosspoint switch - enabling continuous wave mixing without external components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ADC Resolution | 12 bits - provides 4096 quantization levels for high-fidelity echo amplitude digitization in B-mode imaging. |
| Max Sample Rate | 25 MSPS - matches typical ultrasound system clocking for 15.6 MHz bandwidth imaging with Nyquist-compliant sampling. |
| LNA Input Noise | 1.1 nV/√Hz @ 5 MHz - enables detection of weak acoustic echoes in deep-tissue scanning with minimal signal degradation. |
| VGA Gain Range | −6 dB to +24 dB - supports dynamic range compression across varying tissue depths while maintaining linearity in dB scale. |
| AAF Cutoff | Programmable 8–18 MHz - allows real-time anti-aliasing tuning per probe frequency (e.g., 3.5 MHz, 7.5 MHz, 12 MHz transducers). |
| SNR / SFDR | 70 dB / 80 dB - ensures clean digitization of microvolt-level RF echoes amid harmonic distortion and intermodulation artifacts. |
| Power per Channel | 150 mW @ 40 MSPS (TGC), 90 mW (CW Doppler) - enables portable and battery-powered ultrasound systems with thermal management feasibility. |
| Crosspoint Switch | 8×6 differential - routes LNA outputs to CW mixer inputs, supporting multi-beam Doppler processing without external analog switches. |
Pinout & Package
AD9271BSVZ-25 is housed in a RoHS-compliant 100-lead TQFP (16 mm × 16 mm, 0.5 mm pitch) with exposed thermal paddle tied to analog ground. Pin functions are fully differential per channel and include dedicated LNA inputs (LI-A to LI-H), LNA outputs (LO-A/LOSW-A to LO-H/LOSW-H), ADC LVDS outputs (DOUTA+ to DOUTH−), CW Doppler outputs (CWD0+ to CWD5−), and control interfaces (SPI, clock, power-down).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| LI-A to LI-H | LNA Analog Input (8 channels) | Single-ended RF echo inputs with active 50 Ω/100 Ω/15 kΩ termination selectable via RFB resistor. |
| LO-A/LOSW-A to LO-H/LOSW-H | LNA Differential Output (8 channels) | Drives VGA stage; complementary outputs reduce common-mode noise in high-gain analog paths. |
| DOUTA+ to DOUTH− | LVDS ADC Serial Output (8 channels) | ANSI-644 compliant 12-bit DDR data stream; eliminates parallel bus routing and timing skew in dense PCB layouts. |
| CWD0+ to CWD5− | CW Doppler Crosspoint Output (6 ports) | Supports 6 independent Doppler mixer outputs from 8 LNA inputs - enables flexible beam steering and velocity encoding. |
| CLK+/CLK− | Differential Sample Clock Input | Accepts LVPECL/LVDS/CMOS clocks; internal multiplier generates LVDS data rate clock without external PLL. |
| PDWN / STBY | Power Control Inputs | Full power-down (4.5 mW total) and standby (<2 μs wake-up) enable dynamic power scaling per scan line or frame. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated TGC Signal Chain | Combines LNA, VGA, AAF, and ADC per channel - eliminates discrete component matching, reduces board area by >60% vs. discrete solutions. |
| SPI-Programmable AAF | Third-order Butterworth filter cutoff adjustable from 8 MHz to 18 MHz - adapts anti-aliasing to transducer center frequency without hardware change. |
| Dual-Mode Operation | Hardware-selectable TGC digitization or CW Doppler mixing - enables single-chip support for B-mode, M-mode, and color Doppler imaging. |
| Fast Overload Recovery | <10 ns recovery from input overdrive - preserves downstream signal integrity during near-field clutter or probe contact transients. |
| Low-Power LVDS Interface | Reduced-swing LVDS outputs (150–250 mV p-p) cut I/O power by ~40% vs. standard LVDS - critical for multi-channel portable systems. |
| On-Chip Reference | 1.0 V internal ADC reference with ±20 mV error - removes need for external precision voltage reference and associated layout sensitivity. |
Applications
| Ultrasound B-Mode Imaging | Color Doppler Flow Mapping |
|---|---|
|
Use Scenario: Real-time grayscale anatomical imaging using pulse-echo RF data from phased-array transducers. IC Role / Device Role / Timing Role: Primary analog front-end digitizing 8 receive channels simultaneously; provides time-gain compensated, filtered, and serialized echo data at 25 MSPS. Use Value: Enables compact, low-power ultrasound systems with 70 dB SNR and 80 dB SFDR - critical for distinguishing subtle tissue boundaries and low-contrast lesions. |
Use Scenario: Velocity-encoded blood flow visualization using quadrature demodulated Doppler signals. IC Role / Device Role / Timing Role: Configured in CW Doppler mode; LNA outputs routed via crosspoint switch to external mixers or on-chip transconductance amps for phase-sensitive detection. Use Value: Eliminates 8 discrete analog switches and associated layout complexity; supports 6 independent Doppler beams from 8 channels for directional flow analysis. |
| Portable Handheld Ultrasound | Automotive Radar Sensing |
|
Use Scenario: Battery-operated point-of-care devices requiring thermal efficiency and small form factor. IC Role / Device Role / Timing Role: Eight-channel AFE operating at 150 mW/channel in TGC mode and 90 mW/channel in CW mode; supports rapid power cycling via PDWN/STBY pins. Use Value: Extends battery life while maintaining clinical-grade image quality - validated over −40°C to +85°C industrial temperature range. |
Use Scenario: Medium-range automotive radar receivers detecting object distance/velocity using FMCW or pulsed waveforms. IC Role / Device Role / Timing Role: High-linearity, low-noise digitization of 77 GHz downconverted IF signals; leverages wide 70 MHz LNA bandwidth and programmable AAF for adaptive filtering. Use Value: Delivers 1.1 nV/√Hz input noise and 70 dB SNR at 5 MHz - improves radar sensitivity for pedestrian detection and blind-spot monitoring. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar octal-channel ultrasound AFE applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9272BSVZ-40 | Higher sample rate (40 MSPS), identical architecture and pinout; consumes 180 mW/channel at full rate. | Better suited for high-frequency transducers (>10 MHz) requiring wider bandwidth digitization. | Select when system clock exceeds 25 MSPS and thermal budget allows +20% power per channel. |
| AD9273BSVZ-50 | 50 MSPS max rate, same feature set; adds enhanced digital test pattern generation and improved SFDR (82 dB). | Targeted at premium diagnostic systems needing highest dynamic range and built-in self-test capability. | Choose for OEM platforms requiring production testability and margin for future probe upgrades. |
Compared with AD9272BSVZ-40 and AD9273BSVZ-50, the AD9271BSVZ-25 offers optimal balance of performance, power (150 mW/channel), and cost for mid-tier portable ultrasound - retaining full functionality including crosspoint switch and SPI-programmable AAF without overspecifying speed.
Availability
AD9271BSVZ-25 is available at Aetrix Electronics and suitable for medical imaging equipment, portable diagnostic devices, and automotive radar receivers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for AD9271BSVZ-25 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, automotive, communications, and healthcare markets with precision ICs since 1965.
The AD9271BSVZ-25 belongs to Analog Devices' ultrasound AFE product line, engineered specifically for integration into compact, low-power medical imaging systems requiring multichannel analog signal conditioning and digitization in a single package.
FAQ
What is the maximum clock frequency supported by AD9271BSVZ-25?
The AD9271BSVZ-25 supports a maximum sample clock frequency of 25 MSPS, as specified for the -25 variant. Its clock input accepts LVPECL, LVDS, or CMOS-compatible signals, and internal circuitry automatically multiplies the clock to generate appropriate LVDS data and frame clocks. Exceeding 25 MSPS may cause timing violations or reduced AC performance in the AD9271BSVZ-25.
Does AD9271BSVZ-25 include an internal voltage reference for the ADC?
Yes, the AD9271BSVZ-25 features a 1.0 V internal ADC reference with ±20 mV output error and 3 mV load regulation at 1.0 mA. This eliminates the need for an external reference in most configurations, though VREF, REFT, and REFB pins allow optional external reference connection for higher precision applications requiring tighter tolerance than the AD9271BSVZ-25's internal source provides.
How does the crosspoint switch in AD9271BSVZ-25 support CW Doppler operation?
The AD9271BSVZ-25 integrates an 8×6 differential crosspoint switch that routes LNA outputs (LO-A/LOSW-A to LO-H/LOSW-H) to six CW Doppler output pairs (CWD0+ to CWD5−). This enables flexible selection of LNA channels for Doppler mixing without external analog switches, supporting multi-beam velocity encoding and reducing PCB complexity in ultrasound systems using the AD9271BSVZ-25.
What power supply voltages are required for AD9271BSVZ-25 operation?
The AD9271BSVZ-25 requires three supplies: AVDD = 1.8 V (analog core), DRVDD = 1.8 V (digital output drivers), and CWVDD = 3.3 V (CW Doppler output bias). All supplies must be within ±5% tolerance; AVDD and DRVDD share the same nominal voltage but require separate low-noise regulation due to differing current profiles and noise sensitivity in the AD9271BSVZ-25.
Can AD9271BSVZ-25 operate in both TGC and CW Doppler modes simultaneously?
No, the AD9271BSVZ-25 operates in either full TGC mode (LNA→VGA→AAF→ADC) or CW Doppler mode (LNA→transconductance amp→crosspoint switch), but not both simultaneously per channel. The mode is selected via SPI configuration and power control signals; in CW mode, the VGA, AAF, and ADC sections are powered down to reduce power consumption in the AD9271BSVZ-25.
AD9271BSVZ-25 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 100-TQFP Exposed Pad
- Packaging:
- Tray
- Product Status:
- Obsolete
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 25M
- Number of Inputs:
- 8
- Input Type:
- Differential, Single Ended
- Data Interface:
- LVDS - Serial
- Configuration:
- LNA-VGA-AAF-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.8V
- Voltage - Supply, Digital:
- 1.8V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 100-TQFP-EP (14x14)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD9271BSVZ-25 FAQ
1.How can I place an order for AD9271BSVZ-25 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9271BSVZ-25 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9271BSVZ-25 reliable?
The price and inventory of AD9271BSVZ-25 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9271BSVZ-25 is usually 5 days.
3.What payment methods are accepted for AD9271BSVZ-25?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9271BSVZ-25 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9271BSVZ-25?
AD9271BSVZ-25 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9271BSVZ-25 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9271BSVZ-25?
For technical support, including AD9271BSVZ-25 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9271BSVZ-25 requirements.
6.How does Aetrix verify that AD9271BSVZ-25 is sourced from the original manufacturer or authorized distributors?
All AD9271BSVZ-25 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9271BSVZ-25 meets industry standards.
7.What is the process for return or replacement of AD9271BSVZ-25?
All AD9271BSVZ-25 units undergo pre-shipment inspection (PSI). If there is an issue with AD9271BSVZ-25, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9271BSVZ-25 part is unused and in its original packaging.
Return procedure for AD9271BSVZ-25:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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