Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Part Number*
Quantity*
Message
Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Name*
Company*
Email Address*
Phone/WhatsApp
Upload My List
Message

Analog Devices Inc. AD9411BSV-170

Part No.:
AD9411BSV-170
Manufacturer:
Analog Devices Inc.
Category:
Analog to Digital Converters (ADC)
Package:
100-TQFP Exposed Pad
Datasheet:
AetrixAD9411BSV-170.pdf
Description:
IC ADC 10BIT 170MSPS 100-TQFP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:421

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Part Number
Quantity*
Price
Name*
Company
Email*
Comments

Product details

Overview

AD9411BSV-170 from Analog Devices is a 10-bit, 170 MSPS monolithic pipeline analog-to-digital converter optimized for wideband carrier and broadband systems. It features LVDS outputs, on-chip track-and-hold and reference, 700 MHz full-power analog bandwidth, 3.3 V single-supply operation, and delivers 60 dB SNR at 70 MHz input frequency - deployed in radar subsystems requiring high dynamic range digitization.

For engineers reviewing the AD9411BSV-170 datasheet, AD9411BSV-170 pinout, AD9411BSV-170 application, or AD9411BSV-170 equivalent, key selection criteria include sampling rate (170 MSPS), LVDS output compatibility with FPGAs, ENOB of 9.8 bits at 70 MHz, differential clock interface (LVPECL), and industrial temperature range (–40°C to +85°C) support.

Technical Context

The AD9411BSV-170 implements a 10-bit pipeline ADC core with integrated track-and-hold and scalable internal reference. Its LVDS digital outputs support both twos complement and offset binary formats, and it includes a dedicated data clock output (DCO±) to synchronize capture timing in high-speed FPGA interfaces.

It uses a differential LVPECL-compatible clock input (CLK±), supports dual input voltage ranges (1.536 V or 0.766 V p-p differential), and incorporates a clock duty cycle stabilizer. The device operates across –40°C to +85°C and is fabricated in an advanced BiCMOS process for low jitter (0.25 ps rms aperture uncertainty) and stable performance at 170 MSPS.

Key Specifications

ParameterValue and Actual Design Meaning
Resolution10-bit - defines quantization step size and theoretical maximum SNR of ~62 dB.
Max Sampling Rate170 MSPS - determines Nyquist bandwidth (85 MHz) and real-time signal capture capability.
SNR @ 70 MHz60 dB - enables detection of signals 1 million times smaller than full-scale in RF receiver front-ends.
ENOB @ 70 MHz9.8 bits - reflects effective resolution after noise and distortion degrade ideal 10-bit performance.
Analog Bandwidth700 MHz - supports direct undersampling of IF signals up to UHF bands without external filtering.
Power Dissipation1.27 W typical - requires thermal management via exposed heat slug and PCB ground plane attachment.
Supply Voltage3.3 V (AVDD/DRVDD) - simplifies power architecture by eliminating need for multiple supply rails.
Output InterfaceLVDS (D0± to D9±, OR±, DCO±) - reduces EMI and enables >15 cm trace lengths to FPGA I/O banks.

Pinout & Package

AD9411BSV-170 is housed in a 100-lead e-PAD TQFP package (exposed heat slug electrically connected to AGND) rated for –40°C to +85°C operation. The conductive slug must be soldered to a solid ground plane to maintain junction temperature within limits under full load.

Pin/TerminalCircuit RoleDesign Meaning
VIN+, VIN–Differential analog inputAccepts 1.536 V or 0.766 V p-p differential signal; input impedance ≈ 3 kΩ || 5 pF.
CLK+, CLK–Differential clock inputLVPCECL-compatible; requires ≥200 mV differential swing and common-mode 1.375–1.575 V.
D0+ to D9+, D0– to D9–LVD data outputs10-bit parallel LVDS bus; RSET = 3.74 kΩ sets output current for 247–454 mV differential swing.
DCO+, DCO–Data clock outputLVDS copy of sampling clock; used to latch data in FPGA with minimal skew (0.2–0.8 ns).
OR+, OR–Overrange indicatorDifferential LVDS flag signaling input exceeds selected full-scale range - critical for AGC loop feedback.
S1Data format selectGND = offset binary; AVDD = twos complement - configures FPGA logic decoding path.
S5Full-scale adjustGND = 1.536 V p-p range; AVDD = 0.766 V p-p range - selects input sensitivity for system-level gain staging.
SENSE, VREFReference mode controlSENSE float → internal 1.235 V reference; SENSE = DRVDD → external reference mode.

Key Features

FeatureDesign Value
On-chip track-and-holdEliminates need for external THA, reducing board area and phase mismatch in multi-channel systems.
LVDS output interfaceEnables robust, low-noise, high-speed connection to Xilinx/Intel FPGA transceivers without termination resistors on-board.
Integrated voltage referenceRemoves external reference IC and associated decoupling, lowering BOM count and layout complexity.
Out-of-range (OR) flagProvides real-time saturation detection for automatic gain control (AGC) in software-defined radio receivers.
Exposed thermal pad (e-PAD)Reduces θJA to 25°C/W when soldered to ground plane - essential for maintaining <150°C junction temp at 1.27 W.
Single 3.3 V supplyUnifies analog and digital rail requirements, simplifying power delivery network design and reducing DC/DC converter count.

Applications

Radar Signal DigitizationCommunications Test Equipment

Use Scenario: Digitizing 70 MHz IF signals from pulsed Doppler radar receivers with high SFDR to resolve weak targets near strong clutter.

IC Role / Device Role / Timing Role: High-speed ADC front-end capturing baseband-equivalent samples with 60 dB SNR and 80 dBc SFDR at 170 MSPS.

Use Value: Enables accurate pulse compression and Doppler processing without aliasing or harmonic contamination due to 700 MHz analog bandwidth and low DNL (±0.15 LSB).

Use Scenario: Capturing wideband modulated waveforms (e.g., LTE, 5G NR) in automated test equipment for EVM and ACLR validation.

IC Role / Device Role / Timing Role: Precision digitizer providing 9.8-bit ENOB and low jitter (0.25 ps rms) for repeatable spectral analysis.

Use Value: Supports >100 MHz instantaneous bandwidth measurement with <0.5% gain error drift over temperature, ensuring calibration stability.

Cable Reverse Path MonitoringWireless Broadband Infrastructure

Use Scenario: Monitoring upstream DOCSIS channels (5–42 MHz) in cable headend equipment with simultaneous multi-channel capture.

IC Role / Device Role / Timing Role: Low-power, high-linearity ADC enabling dense channel stacking with minimal crosstalk (<–70 dB).

Use Value: Delivers ±0.25 LSB INL and 1.5 V input range to preserve SNR across varying upstream signal levels without manual gain adjustment.

Use Scenario: Baseband sampling in massive MIMO remote radio heads where space, power, and thermal constraints are critical.

IC Role / Device Role / Timing Role: Compact, single-supply ADC interfacing directly to FPGA fabric via LVDS for real-time beamforming preprocessing.

Use Value: Reduces system power by 30% vs. dual-rail alternatives and eliminates level-shifting circuitry through native 3.3 V LVDS compliance.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ADC applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
AD9430BSTZ-170Pin-compatible LVDS mode variant; identical pinout and timing but rated for 170 MSPS only (no 200 MSPS grade).Same use cases; lacks AD9411BSV-170's clock duty cycle stabilizer and selectable full-scale range (S5).Select when strict pin compatibility with legacy AD9430 layouts is required and S5/S1 configuration flexibility is unnecessary.
ADS5463IPFP13-bit, 500 MSPS TI ADC; higher resolution and speed but consumes 2.8 W and requires ±1.8 V/3.3 V supplies.Used in next-gen test equipment needing >10-bit ENOB at >200 MHz IF; not drop-in due to different supply, pinout, and interface (CMOS/LVDS selectable).Choose when system demands >11-bit ENOB at 100+ MHz input or supports complex power sequencing - not for direct replacement.

Compared with AD9430BSTZ-170, AD9411BSV-170 adds full-scale range selection and clock stabilization for improved system-level timing margin; compared with ADS5463IPFP, it trades resolution and speed for lower power, simpler supply, and proven integration in cost-sensitive infrastructure.

Availability

AD9411BSV-170 is available at Aetrix Electronics and suitable for radar subsystems, communications test equipment, cable reverse-path monitoring, and wireless broadband infrastructure requiring stable component supply and long-term industrial temperature support.

Supply support for AD9411BSV-170 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving industrial, communications, automotive, and aerospace markets since 1965.

The AD9411 series belongs to Analog Devices' high-speed data converter product line, designed specifically for wideband digitization in demanding RF and IF signal chains where dynamic performance, low power, and ease of FPGA interfacing are critical.

FAQ

What is the maximum analog input frequency supported by the AD9411BSV-170?

The AD9411BSV-170 has a full-power analog bandwidth of 700 MHz, meaning it maintains specified dynamic performance (e.g., SNR ≥60 dB) for input frequencies up to 700 MHz. This allows direct undersampling of UHF-band signals without external anti-alias filtering in many IF-sampling architectures. Performance metrics such as SFDR and ENOB are guaranteed up to 70 MHz at 170 MSPS per datasheet Table 2, but usable bandwidth extends significantly higher.

Does the AD9411BSV-170 require external components for basic operation?

Yes - the AD9411BSV-170 requires external components for stable operation: a 3.74 kΩ resistor from LVDSBIAS to ground to set LVDS output current, proper decoupling capacitors on AVDD/DRVDD (per datasheet Figure 21 layout guidelines), and controlled-impedance routing for CLK± and DCO±. The internal reference eliminates need for external VREF, but external reference mode (via SENSE) requires a precision 1.23 V source.

How does the AD9411BSV-170 handle input overrange conditions?

The AD9411BSV-170 provides a differential LVDS out-of-range (OR±) output that asserts when the analog input exceeds the selected full-scale range (1.536 V or 0.766 V p-p, set by S5). This flag updates within one conversion cycle and recovers in exactly one cycle after input returns within range - enabling deterministic AGC response in real-time signal processing pipelines using the AD9411BSV-170.

Can the AD9411BSV-170 interface directly with Xilinx Kintex-7 FPGA banks?

Yes - the AD9411BSV-170's LVDS outputs (D0±–D9±, OR±, DCO±) are fully compatible with Xilinx Kintex-7 FPGA I/O banks configured for LVDS_25 standards. The 247–454 mV differential swing and 1.125–1.375 V common-mode voltage meet Xilinx's LVDS input specifications. No level shifters or terminators are needed beyond the FPGA's internal 100 Ω differential termination enabled in IOSTANDARD settings for the AD9411BSV-170 interface.

What thermal management is required for continuous operation of the AD9411BSV-170 at 170 MSPS?

The AD9411BSV-170 dissipates 1.27 W typical at 170 MSPS and requires attachment of its exposed e-PAD to a solid internal ground plane. With the heat slug soldered, θJA drops to 25°C/W (vs. 32°C/W unsoldered), limiting junction temperature rise to ~32°C above ambient. For operation at +85°C ambient, this keeps junction temperature at ~117°C - well below the 150°C absolute maximum. Thermal vias under the pad and copper pour on adjacent layers are strongly recommended.

AD9411BSV-170 Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
-
Package/Case:
100-TQFP Exposed Pad
Packaging:
Bag
Product Status:
Obsolete
Number of Bits:
10
Sampling Rate (Per Second):
170M
Number of Inputs:
-
Input Type:
-
Data Interface:
Parallel
Configuration:
-
Ratio - S/H:ADC:
-
Number of A/D Converters:
1
Architecture:
-
Reference Type:
-
Voltage - Supply, Analog:
-
Voltage - Supply, Digital:
-
Features:
-
Operating Temperature:
-40°C ~ 85°C
Supplier Device Package:
100-TQFP-EP (14x14)
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

AD9411BSV-170 FAQ

1.How can I place an order for AD9411BSV-170 through Aetrix?

Please submit a Request for Quotation (RFQ) for AD9411BSV-170 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AD9411BSV-170 reliable?

The price and inventory of AD9411BSV-170 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9411BSV-170 is usually 5 days.

3.What payment methods are accepted for AD9411BSV-170?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9411BSV-170 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for AD9411BSV-170?

AD9411BSV-170 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AD9411BSV-170 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AD9411BSV-170?

For technical support, including AD9411BSV-170 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9411BSV-170 requirements.

6.How does Aetrix verify that AD9411BSV-170 is sourced from the original manufacturer or authorized distributors?

All AD9411BSV-170 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9411BSV-170 meets industry standards.

7.What is the process for return or replacement of AD9411BSV-170?

All AD9411BSV-170 units undergo pre-shipment inspection (PSI). If there is an issue with AD9411BSV-170, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AD9411BSV-170 part is unused and in its original packaging.

Return procedure for AD9411BSV-170:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

AD9411BSV-170 Tags

  • AD9411BSV-170
  • AD9411BSV-170 PDF
  • AD9411BSV-170 Datasheet
  • AD9411BSV-170 Specifications
  • AD9411BSV-170 Images
  • Analog Devices Inc.
  • Analog Devices Inc. AD9411BSV-170
  • Buy AD9411BSV-170
  • AD9411BSV-170 Price
  • AD9411BSV-170 Distributor
  • AD9411BSV-170 Supplier
  • AD9411BSV-170 Wholesale
Related Products
ADC081C021CIMKX/NOPB
ADC081C021CIMKX/NOPB

Texas Instruments

MCP3021A5T-E/OT
MCP3021A5T-E/OT

Microchip Technology

TLA2024IRUGR
TLA2024IRUGR

Texas Instruments

MCP3221A5T-E/OT
MCP3221A5T-E/OT

Microchip Technology

MCP3221A5T-I/OT
MCP3221A5T-I/OT

Microchip Technology

MCP3221A4T-E/OT
MCP3221A4T-E/OT

Microchip Technology

MCP3221A6T-E/OT
MCP3221A6T-E/OT

Microchip Technology

MCP3221A0T-E/OT
MCP3221A0T-E/OT

Microchip Technology

MCP3221A1T-E/OT
MCP3221A1T-E/OT

Microchip Technology

ADC121S021CIMFX/NOPB
ADC121S021CIMFX/NOPB

Texas Instruments

MCP3001-I/MS
MCP3001-I/MS

Microchip Technology

MCP3001-I/SN
MCP3001-I/SN

Microchip Technology

Tech Hub

Search

Search

PRODUCT

PRODUCT

PHONE

PHONE

USER

USER