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Analog Devices Inc. AD9625-2.6EB
- Part No.:
- AD9625-2.6EB
- Manufacturer:
- Analog Devices Inc.
- Package:
- Datasheet:
-
AD9625-2.6EB.pdf
- Description:
- EVAL BOARD FOR AD9625
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Product details
Overview
AD9625-2.6EB from Analog Devices is a 12-bit, 2.6 GSPS monolithic analog-to-digital converter designed for direct RF sampling in the second Nyquist zone. It features 3.2 GHz analog input bandwidth, JESD204B subclass 1 serial output (6.5 Gbps), dual decimation filters with 10-bit NCOs, and operates from 1.3 V/2.5 V supplies. Used in radar and electronic warfare systems requiring high dynamic range at microwave frequencies.
For engineers reviewing the AD9625-2.6EB datasheet, AD9625-2.6EB pinout, AD9625-2.6EB application, or AD9625-2.6EB equivalent, key selection criteria include SFDR ≥77 dBc at 1.8 GHz input, SNR = 57.5 dBFS at 1 GHz, sub-80 fs aperture jitter, JESD204B lane count configurability (6–8 lanes), and multichip synchronization via SYSREF± timestamping.
Technical Context
The AD9625-2.6EB implements a pipelined ADC architecture with on-chip reference and differential clock input. Its digital downconverter (DDC) includes two independent decimate-by-8 or decimate-by-16 filters, each paired with a 10-bit numerically controlled oscillator (NCO) for frequency translation and channelization.
JESD204B subclass 1 operation enables deterministic latency and multidevice synchronization using SYSREF±. The device supports flexible digital output modes including 8-bit/10-bit encoding, scrambler enable/disable, and frame alignment character insertion - all configurable via SPI interface.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - guarantees no missing codes across full operating range, critical for high-fidelity signal capture in spectrum analysis. |
| Max Sampling Rate | 2.6 GSPS - enables direct sampling of signals up to 1.3 GHz without analog pre-downconversion. |
| Analog Input BW | 3.2 GHz - supports wideband RF inputs through second Nyquist zone, essential for radar pulse fidelity. |
| SFDR @ 1.8 GHz | 77 dBc - defines spurious-free dynamic range for detecting weak signals adjacent to strong interferers in EW systems. |
| SNR @ 1 GHz | 57.5 dBFS - determines minimum detectable signal level in noise-limited applications like active jamming receivers. |
| JESD204B Speed | 6.5 Gbps per lane (6-lane mode) - reduces PCB routing complexity vs parallel CMOS while maintaining deterministic latency. |
| Aperture Uncertainty | 80 fs rms - limits sampling-time jitter-induced SNR degradation at high IF frequencies. |
| Power Dissipation | 4.3 W (eight-lane mode) - requires thermal management planning for dense RF front-end layouts. |
Pinout & Package
AD9625-2.6EB is housed in a 144-lead LFCSP (12 mm × 12 mm × 1.1 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments follow standard Analog Devices high-speed ADC layout: analog/ground/power segregation, differential signal pairs routed symmetrically, and dedicated SERDOUT[0]± to SERDOUT[7]± lanes for JESD204B serialization.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN+, VIN− | Differential analog input | Accepts 1.2 V p-p full-scale differential RF signal; matched impedance and layout required for >3.2 GHz bandwidth preservation. |
| CLK+, CLK− | Differential sampling clock input | Accepts 1.65 V p-p LVDS-compatible clock; timing precision directly impacts aperture jitter and SNR performance. |
| SYSREF+, SYSREF− | Multi-device synchronization reference | Enables deterministic JESD204B link alignment across multiple AD9625-2.6EB devices for phased-array radar beamforming. |
| SERDOUT[0]± to SERDOUT[7]± | JESD204B serialized data outputs | Eight CML differential lanes support 6- or 8-lane configurations; termination must match 100 Ω differential impedance. |
| RSTB | Asynchronous reset input | Active-low signal resets internal logic and DDC state machines; must meet setup/hold relative to CLK for reliable initialization. |
| SDIO, SCLK, CSB | SPI control interface | Configures DDC filters, gain/offset calibration, test patterns, and JESD204B link parameters; operates at ≤50 MHz. |
| IRQ | Interrupt request output | Signals events such as DDC overflow, fast detect trigger, or SYSREF alignment completion; level-sensitive CMOS output. |
| FD | Fast detect output | Indicates when input exceeds programmable threshold within 82 clock cycles - used for real-time signal presence detection in SIGINT. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent DDCs | Each with decimate-by-8/16 and 10-bit NCO enables simultaneous narrowband channelization of two distinct RF bands without FPGA preprocessing. |
| JESD204B Subclass 1 | Guarantees deterministic latency and multi-device synchronization via SYSREF± - essential for coherent T/R module timing in AESA radar. |
| Timestamp feature | Embeds precise sample timing metadata into JESD204B frames, enabling post-acquisition time-of-arrival correlation across distributed receivers. |
| Conversion error rate | <10⁻¹⁵ - ensures bit-perfect data integrity over years of continuous operation in mission-critical military comms systems. |
| Built-in test patterns | Selectable digital patterns (ramp, PN, checkerboard) allow in-system ADC validation without external signal sources during field maintenance. |
Applications
| Radar Systems | Military Communications |
|---|---|
Use Scenario: Active electronically scanned array (AESA) radar digitizing X-band return pulses with 1.2 GHz instantaneous bandwidth. IC Role / Device Role / Timing Role: Primary RF-sampling ADC capturing baseband I/Q or direct IF samples; provides timestamped JESD204B output synchronized across 16+ channels via SYSREF±. Use Value: 3.2 GHz analog bandwidth preserves pulse rise time fidelity; 77 dBc SFDR at 1.8 GHz enables detection of low-RCS targets amid clutter. | Use Scenario: Wideband SATCOM terminal receiving frequency-hopped signals across 2–6 GHz band using direct RF sampling. IC Role / Device Role / Timing Role: Front-end ADC feeding FPGA-based demodulator; DDCs translate hopping carriers to baseband in real time. Use Value: Dual 10-bit NCOs allow concurrent tracking of primary and diversity channels; JESD204B reduces interconnect count vs parallel interface. |
| Electronic Warfare | Spectrum Analysis |
Use Scenario: Digital receiver in airborne SIGINT pod monitoring 0.5–3 GHz spectrum for threat emitter identification. IC Role / Device Role / Timing Role: High-speed digitizer feeding real-time FFT engine; fast detect (FD) output triggers recording on signal onset. Use Value: 82-cycle FD latency enables microsecond-level response; 57.5 dBFS SNR ensures accurate amplitude measurement for emitter fingerprinting. | Use Scenario: Benchtop spectrum analyzer performing real-time 1 GHz bandwidth FFTs with 100% probability of intercept. IC Role / Device Role / Timing Role: Core ADC providing 2.6 GSPS samples to high-throughput processing chain; timestamping supports gap-free acquisition. Use Value: −149.5 dBFS/Hz noise spectral density sets system noise floor; no missing codes prevents harmonic distortion artifacts in displayed spectra. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9680-500 | 14-bit, 500 MSPS; lower speed but higher resolution and SNR (70.5 dBFS); integrated digital decimation filters. | Better suited for narrowband communications where resolution outweighs bandwidth; lacks direct RF sampling capability above 1 GHz. | Select AD9680-500 when system SNR requirement exceeds 65 dBFS and maximum input frequency is below 500 MHz. |
| ADC12DJ3200 | 12-bit, dual-channel 3.2 GSPS; supports interleaved mode for 6.4 GSPS single-channel equivalent; JESD204C capable. | Higher aggregate throughput and newer JESD204C support; larger package (196-BGA) and higher power (5.8 W). | Choose ADC12DJ3200 for next-generation systems requiring >3 GSPS or migration path to JESD204C infrastructure. |
Compared with AD9625-2.6EB, AD9680-500 trades sampling speed for resolution in narrowband applications, while ADC12DJ3200 extends raw throughput and protocol capability at the cost of increased power and board area - making AD9625-2.6EB optimal for balanced 2.6 GSPS/12-bit RF sampling in size- and power-constrained military platforms.
Availability
AD9625-2.6EB is available at Aetrix Electronics and suitable for radar, electronic warfare, and high-performance spectrum analysis applications requiring stable component supply, long-term obsolescence management, and traceable sourcing for defense-grade production.
Supply support for AD9625-2.6EB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The AD9625 product line delivers ultra-high-speed ADCs optimized for direct RF sampling in defense, aerospace, and instrumentation - emphasizing wide analog bandwidth, low jitter, and deterministic digital interfaces for coherent multi-channel systems.
FAQ
What is the maximum analog input frequency supported by the AD9625-2.6EB?
The AD9625-2.6EB supports analog input frequencies up to 3.2 GHz full-power bandwidth, enabling direct sampling of signals in the second Nyquist zone (up to 1.3 GHz at 2.6 GSPS). This is confirmed in the datasheet's "Analog Full-Power Bandwidth" specification (3.2 GHz, Table 1) and validated by typical performance plots showing SFDR and SNR out to 1.8 GHz. The device maintains usable dynamic range beyond the first Nyquist zone due to its high sampling rate and linear architecture.
Does the AD9625-2.6EB support JESD204B subclass 1 synchronization?
Yes, the AD9625-2.6EB fully supports JESD204B subclass 1, including deterministic latency and multidevice synchronization via the SYSREF± input pair. The datasheet explicitly states subclass 1 compliance in the FEATURES section and details SYSREF± setup/hold timing (tSU_SR = +200 ps, tH_SR = −100 ps) in Table 4. This allows precise alignment of JESD204B links across multiple AD9625-2.6EB devices in phased-array radar systems.
What power supply voltages does the AD9625-2.6EB require?
The AD9625-2.6EB requires two analog supply domains (AVDD1 = 1.3 V, AVDD2 = 2.5 V), two digital supply domains (DVDD1 = 1.3 V, DVDD2 = 2.5 V), and one driver supply domain (DRVDD1 = 1.3 V, DRVDD2 = 2.5 V), plus DVDDIO and SPI_VDDIO at 2.5 V (up to 3.3 V). These values are specified in Table 1 (DC Specifications) and confirmed in the "Power Supplies" section of the datasheet, with total power dissipation reaching 4.3 W in eight-lane mode.
Can the AD9625-2.6EB perform digital downconversion internally?
Yes, the AD9625-2.6EB integrates two independent digital downconverters (DDCs), each configurable for decimation by 8 or 16 and paired with a 10-bit numerically controlled oscillator (NCO). This is documented in the FEATURES list and detailed in the "Digital Downconverters (DDC)" section (pages 33–36). Each DDC can translate and filter a separate RF band in real time, reducing FPGA processing load in wideband receivers.
What is the aperture jitter specification for the AD9625-2.6EB?
Aperture uncertainty (jitter) for the AD9625-2.6EB is specified as 80 fs rms in the SWITCHING SPECIFICATIONS table (Table 4). This value directly contributes to SNR degradation at high input frequencies and is measured under standard conditions (AVDD1/DVDD1/DRVDD1 = 1.3 V, AVDD2/DVDD2/DRVDD2 = 2.5 V, 1.2 V internal reference). Lower jitter preserves SNR - e.g., 80 fs yields ~57.5 dBFS SNR at 1 GHz per theoretical calculation.
AD9625-2.6EB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Packaging:
- Box
- Product Status:
- Obsolete
- Number of A/D Converters:
- 1
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 2.6G
- Data Interface:
- Serial JESD204B, SPI™
- Input Range:
- 1Vpp
- Power (Typ) @ Conditions:
- 4W @ 2.6GSPS
- Utilized IC / Part:
- AD9625
- Contents:
- Board(s)
AD9625-2.6EB FAQ
1.How can I place an order for AD9625-2.6EB through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9625-2.6EB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9625-2.6EB reliable?
The price and inventory of AD9625-2.6EB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9625-2.6EB is usually 5 days.
3.What payment methods are accepted for AD9625-2.6EB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9625-2.6EB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9625-2.6EB?
AD9625-2.6EB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9625-2.6EB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9625-2.6EB?
For technical support, including AD9625-2.6EB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9625-2.6EB requirements.
6.How does Aetrix verify that AD9625-2.6EB is sourced from the original manufacturer or authorized distributors?
All AD9625-2.6EB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9625-2.6EB meets industry standards.
7.What is the process for return or replacement of AD9625-2.6EB?
All AD9625-2.6EB units undergo pre-shipment inspection (PSI). If there is an issue with AD9625-2.6EB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9625-2.6EB part is unused and in its original packaging.
Return procedure for AD9625-2.6EB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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