Analog Devices Inc. AD9628-125EBZ

Overview

AD9628-125EBZ from Analog Devices is a high-speed analog-to-digital converter (ADC) evaluation board designed specifically for the AD9628-125, a dual 12-bit, 125 MSPS ADC with JESD204B serial output interface. It provides full signal chain support including transformer-coupled analog inputs, selectable clocking (on-board oscillator or external source), SPI-based configuration, and CMOS/LVDS output buffering for FPGA capture via HSC-ADC-EVALCZ.

For engineers reviewing the AD9628-125EBZ datasheet, AD9628-125EBZ pinout, AD9628-125EBZ application, or AD9628-125EBZ equivalent, this page delivers verified hardware configuration options, clocking architecture details, power supply routing, jumper-controlled operating modes, and software integration guidance using VisualAnalog and SPI Controller tools - all essential for rapid ADC characterization and system-level validation.

Technical Context

The AD9628-125EBZ implements a dual-channel, interleaved sampling architecture supporting up to 125 million samples per second per channel. Its analog front end uses a 50 Ω double-balun input network optimized for 100–200 MHz RF/IF signals, with configurable VREF (1.0 V internal reference yielding 2.0 V p-p full-scale range) and RBIAS (10 kΩ default) for core bias tuning.

It supports three clocking paths: (1) transformer-coupled external single-ended sine wave (50 Ω, ~2.8 V p-p), (2) on-board Valpey Fisher VFAC3-BHL oscillator (125 MHz variant installed), or (3) AD9517-based LVPECL differential clock generation. Power delivery includes LDO-regulated 1.8 V AVDD/DRVDD/DVDD rails or optional ADP2114 switching regulator substitution for efficiency testing.

Key Specifications

Availability

AD9628-125EBZ is available at Aetrix Electronics and suitable for high-speed data acquisition, radar receiver prototyping, communications test equipment, and broadband instrumentation requiring stable component supply and validated reference design support.

Supply support for AD9628-125EBZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.

The AD9628-125EBZ belongs to Analog Devices' high-speed ADC evaluation platform family, engineered to accelerate time-to-test for RF-sampling and wideband digitization applications in defense, communications, and test & measurement systems.

FAQ

What is the primary function of the AD9628-125EBZ?

The AD9628-125EBZ is an evaluation board purpose-built for the AD9628-125 dual 12-bit, 125 MSPS analog-to-digital converter. It provides complete signal conditioning, clock distribution, power regulation, and digital interface circuitry to enable immediate performance characterization and system integration testing without custom PCB development. The AD9628-125EBZ supports both transformer-coupled analog inputs and flexible clocking options to validate real-world ADC behavior under defined RF/IF conditions.

Does the AD9628-125EBZ include an on-board clock source?

Yes, the AD9628-125EBZ ships with a Valpey Fisher VFAC3-BHL series low-phase-noise oscillator pre-installed and configured for 125 MHz operation - matching the rated speed of the AD9628-125. This oscillator connects via transformer coupling into the ADC clock inputs. Users can disable it using jumper J605 and substitute an external 50 Ω sine-wave clock source at SMA connector J602, or route clock through the optional AD9517 LVPECL driver (U701) by reconfiguring resistors R607/R608/R731/R732.

How is analog input configured on the AD9628-125EBZ?

The AD9628-125EBZ uses a double-balun-coupled analog input path with 50 Ω impedance matching, optimized for frequencies up to 200 MHz. Default configuration (per Figure 4 in UG-003 Rev. A) includes 66.5 Ω series resistors, 0.1 µF AC-coupling capacitors, and 33 Ω termination resistors to set a nominal 2 V p-p full-scale range. Input drive level is typically 10 dBm; higher levels may be needed above 150 MHz due to front-end insertion loss. Balun T602 ensures low-jitter differential conversion prior to ADC sampling.

Which software tools are required to operate the AD9628-125EBZ?

Two primary software tools are required: VisualAnalog for FFT-based performance analysis (SNR, SFDR, harmonic distortion) and SPI Controller for register-level configuration of the AD9628-125. VisualAnalog loads FPGA bitstreams onto the HSC-ADC-EVALCZ capture board and displays real-time spectral plots; SPI Controller enables precise control over clock dividers, data format (offset binary/twos complement), power-down, output enable, and reference mode. Both tools run on Windows and communicate via USB to the evaluation platform.

Can the AD9628-125EBZ be powered using external bench supplies instead of the included wall adapter?

Yes, the AD9628-125EBZ supports external bench power supplies via headers P102 and P103. To use them, users must remove ferrite beads E101, E102, E114, E103, E105, and E107 to isolate the on-board LDOs. Required supplies include 1.8 V @ 1 A for AVDD/DRVDD, 1.8 V @ 1 A for DVDD, 3.3 V @ 1 A for analog support circuitry, and optionally 5 V/3 V @ 1 A for input amplifiers. This mode allows independent rail control and noise isolation critical for sensitive ADC characterization.