Analog Devices Inc. AD9640ABCPZ-80
- Part No.:
- AD9640ABCPZ-80
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 64-VFQFN Exposed Pad, CSP
- Datasheet:
-
AD9640ABCPZ-80.pdf
- Description:
- IC ADC 14BIT PIPELINED 64LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:4,999
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD9640ABCPZ-80 from Analog Devices is a dual-channel, 14-bit, 80 MSPS analog-to-digital converter optimized for communications receivers. It operates from a single 1.8 V analog supply, supports differential analog inputs up to 650 MHz bandwidth, delivers 72.1 dB SNR at 70 MHz input, and features integrated fast detect and signal monitor blocks for AGC implementation in LTE and WCDMA baseband systems.
For engineers reviewing the AD9640ABCPZ-80 datasheet, AD9640ABCPZ-80 pinout, AD9640ABCPZ-80 application, or AD9640ABCPZ-80 equivalent, key selection criteria include its 80 MSPS sampling rate with 72.1 dB SNR at 70 MHz, dual-channel crosstalk of −95 dB, LVDS/CMOS output flexibility, and built-in self-test capability for production test validation.
Technical Context
The AD9640ABCPZ-80 implements two independent pipelined ADC cores with integrated error correction logic, each supporting user-selectable input ranges (1–2 Vp-p) and internal voltage reference. Its duty cycle stabilizer compensates for clock asymmetry, preserving AC performance across temperature and process variation.
It integrates dual AGC assist functions: four-bit fast detect with sub-cycle latency for overrange detection, and a programmable signal monitor block delivering composite magnitude data via dedicated serial SPORT output-both configurable via SPI without interrupting conversion flow.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit - Enables high-fidelity digitization of wide dynamic range IF signals in multimode radio receivers. |
| Sampling Rate | 80 MSPS - Supports Nyquist-sampled IF frequencies up to 40 MHz or undersampled RF bands up to 450 MHz. |
| SNR @ 70 MHz | 72.1 dB - Delivers >11.8 ENOB for accurate demodulation of LTE 20 MHz channels with low EVM impact. |
| Crosstalk | −95 dB - Ensures channel isolation critical for I/Q imbalance correction in direct-conversion architectures. |
| Analog Input BW | 650 MHz - Allows direct sampling of high-IF or RF signals without external filtering degradation. |
| Power @ 80 MSPS | 492 mW (typ) - Optimized for thermally constrained small-cell and portable radio designs. |
| Output Interface | LVDS or 1.8–3.3 V CMOS - Enables interoperability with FPGA I/O banks while minimizing signal integrity risk. |
Pinout & Package
The AD9640ABCPZ-80 is housed in a 64-lead LFCSP (9 mm × 9 mm, 0.85 mm height) with exposed thermal paddle soldered to PCB ground plane for optimal thermal performance and reliability.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN+A / VIN−A VIN+B / VIN−B | Differential analog inputs (Ch A / Ch B) | Accepts wideband RF/IF signals; 650 MHz bandwidth enables direct sampling of LTE/WCDMA carriers. |
| CLK+ / CLK− | Differential clock input | Supports CMOS/LVDS/LVPECL; internal DCS maintains timing margin under duty cycle variation. |
| D0A–D13A / D0B–D13B | 14-bit parallel digital outputs per channel | Configurable as CMOS (1.8–3.3 V) or LVDS (1.8 V); latency fixed at 12 cycles (CMOS) or 12/12.5 (LVDS). |
| FD0A–FD3A / FD0B–FD3B | Fast detect magnitude outputs | 4-bit instantaneous amplitude indicator per channel; <1-cycle latency for real-time AGC loop response. |
| SMI SDO / SMI SCLK / SMI SDFS | Signal Monitor SPORT interface | Dedicated 3-wire serial port for composite signal magnitude data-offloads main data bus during monitoring. |
| CSB / SCLK / SDIO | SPI configuration interface | 3-wire serial port for register access; supports setup of thresholds, BIST, DCS, power modes, and output formatting. |
Key Features
| Feature | Design Value |
|---|---|
| Dual-channel fast detect | Four-bit magnitude output per channel with <1-cycle latency-enables closed-loop AGC within 12.5 ns at 80 MSPS. |
| Programmable signal monitor | Configurable RMS/peak/threshold-crossing mode with dedicated SPORT output-reduces FPGA resource usage in software-defined radios. |
| Integrated voltage reference | 1.0 V internal reference with ±15 mV error-eliminates external reference IC and associated layout complexity. |
| Flexible power-down modes | Standby (68 mW) and full power-down (6 mW)-supports burst-mode operation in battery-powered spectrum analyzers. |
| Integer clock divider (1–8) | Allows use of higher-frequency, lower-jitter clocks while maintaining precise sample rate control-improves jitter immunity in noisy environments. |
Applications
| Cellular Base Station Receiver | Software-Defined Radio (SDR) |
|---|---|
Use Scenario: Digitizing dual-path I/Q signals from zero-IF or low-IF mixers in LTE FDD/TDD macrocells. IC Role / Device Role / Timing Role: Dual ADC front-end providing synchronized 14-bit samples at 80 MSPS with matched gain/offset for coherent MIMO processing. Use Value: −95 dB crosstalk and <±0.6% gain matching enable <−40 dB image rejection without calibration overhead. | Use Scenario: Reconfigurable wideband receiver in military comms or spectrum monitoring equipment. IC Role / Device Role / Timing Role: High-fidelity digitizer supporting 650 MHz analog input bandwidth for real-time frequency hopping and multi-standard decoding. Use Value: On-chip signal monitor and fast detect reduce FPGA logic utilization by >30% versus discrete monitoring solutions. |
| Smart Antenna System | Broadband Test Instrumentation |
Use Scenario: Phase-coherent sampling across multiple antenna elements in beamforming arrays. IC Role / Device Role / Timing Role: Dual-channel ADC with <1 ps aperture jitter and synchronized clock distribution enabling sub-degree phase alignment. Use Value: Aperture uncertainty of 0.1 ps rms ensures <0.05° phase error at 2 GHz carrier-critical for adaptive nulling accuracy. | Use Scenario: Digitizing high-frequency modulated waveforms in vector signal analyzers and oscilloscopes. IC Role / Device Role / Timing Role: Precision ADC capturing transient spectral events with 72.1 dB SNR and 85 dBc SFDR at 70 MHz. Use Value: Built-in BIST and SPI-controlled test modes accelerate production test coverage without external pattern generators. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9627BCPZ-80 | 12-bit resolution, same 64-lead LFCSP package and pinout; lower power (340 mW), reduced SNR (68.5 dB @ 70 MHz). | Targeted at cost-sensitive diversity receivers where 12-bit ENOB suffices for QPSK/16-QAM demodulation. | Select when system-level SNR budget allows 3.6 dB margin reduction and board space reuse is prioritized. |
| ADS42JB69IRGCT | Texas Instruments 16-bit, 250 MSPS dual ADC; requires 3.3 V analog supply; no integrated signal monitor or fast detect. | Used in high-performance radar digitizers requiring >12 ENOB at IF >100 MHz, with external AGC logic. | Choose only if resolution and sampling rate outweigh integration benefits-and if FPGA resources exist for custom monitoring logic. |
Compared with AD9627BCPZ-80, the AD9640ABCPZ-80 adds 2 bits of resolution and integrated AGC assist blocks at +152 mW power; versus ADS42JB69IRGCT, it trades raw speed and resolution for on-chip intelligence and lower supply voltage, simplifying power delivery and reducing FPGA firmware complexity.
Availability
AD9640ABCPZ-80 is available at Aetrix Electronics and suitable for cellular infrastructure, software-defined radio, smart antenna, and broadband instrumentation applications requiring stable component supply, long-term manufacturability, and guaranteed industrial temperature range (−40°C to +85°C) operation.
Supply support for AD9640ABCPZ-80 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, communications, industrial, and aerospace markets since 1965.
The AD9640 product line delivers highly integrated, dual-channel ADCs with embedded signal processing features-designed specifically to simplify receiver front-end design in multistandard wireless infrastructure and defense electronics.
FAQ
What is the maximum analog input frequency supported by the AD9640ABCPZ-80?
The AD9640ABCPZ-80 supports analog input frequencies up to 450 MHz using IF sampling techniques, enabled by its 650 MHz analog input bandwidth and 80 MSPS sampling rate. This allows undersampling of GSM, WCDMA, and LTE bands without external downconversion, provided aliasing is managed through anti-alias filtering or system-level frequency planning.
Does the AD9640ABCPZ-80 require an external voltage reference?
No, the AD9640ABCPZ-80 includes an internal 1.0 V voltage reference with ±15 mV output error over temperature, eliminating the need for an external reference. The device also supports external reference input via the VREF pin if tighter accuracy or custom reference voltage is required for specific calibration schemes.
How does the fast detect feature of the AD9640ABCPZ-80 operate?
The AD9640ABCPZ-80 fast detect feature outputs four bits representing the MSBs of each ADC's digital output, with latency less than one conversion cycle. These bits are available on dedicated FD0A–FD3A and FD0B–FD3B pins and can trigger immediate gain reduction in AGC loops-critical for preventing saturation in burst-mode LTE uplink reception.
Can the AD9640ABCPZ-80 operate with LVDS and CMOS outputs simultaneously?
No, the AD9640ABCPZ-80 supports either LVDS or CMOS digital outputs-not both concurrently. Output format is selected via SPI register configuration (Register 0x14, bit D3). LVDS mode uses DRVDD = 1.8 V; CMOS mode supports DRVDD = 1.8 V or 3.3 V, with corresponding voltage level compliance on D0A–D13A/B and DCOA/DCOB pins.
What thermal management is required for the AD9640ABCPZ-80 in continuous operation?
The AD9640ABCPZ-80 requires the exposed thermal paddle of its 64-lead LFCSP package to be soldered to a solid PCB ground plane. With still air, θJA is 18.8°C/W; adding 1 m/s airflow reduces it to 16.5°C/W. At 492 mW typical power dissipation, junction temperature rise stays below 10°C above ambient-well within the −40°C to +85°C industrial rating.
AD9640ABCPZ-80 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 64-VFQFN Exposed Pad, CSP
- Packaging:
- Tray
- Product Status:
- Active
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 80M
- Number of Inputs:
- 2
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 1.7V ~ 1.9V
- Voltage - Supply, Digital:
- 1.7V ~ 1.9V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 64-LFCSP-VQ (9x9)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD9640ABCPZ-80 FAQ
1.How can I place an order for AD9640ABCPZ-80 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9640ABCPZ-80 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9640ABCPZ-80 reliable?
The price and inventory of AD9640ABCPZ-80 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9640ABCPZ-80 is usually 5 days.
3.What payment methods are accepted for AD9640ABCPZ-80?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9640ABCPZ-80 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9640ABCPZ-80?
AD9640ABCPZ-80 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9640ABCPZ-80 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9640ABCPZ-80?
For technical support, including AD9640ABCPZ-80 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9640ABCPZ-80 requirements.
6.How does Aetrix verify that AD9640ABCPZ-80 is sourced from the original manufacturer or authorized distributors?
All AD9640ABCPZ-80 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9640ABCPZ-80 meets industry standards.
7.What is the process for return or replacement of AD9640ABCPZ-80?
All AD9640ABCPZ-80 units undergo pre-shipment inspection (PSI). If there is an issue with AD9640ABCPZ-80, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9640ABCPZ-80 part is unused and in its original packaging.
Return procedure for AD9640ABCPZ-80:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD9640ABCPZ-80 Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

