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Analog Devices Inc. AD9752ARUZRL7
- Part No.:
- AD9752ARUZRL7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Digital to Analog Converters (DAC)
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AD9752ARUZRL7.pdf
- Description:
- IC DAC 12BIT A-OUT 28TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,566
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Product details
Overview
AD9752ARUZRL7 from Analog Devices is a 12-bit, 125 MSPS current-output DAC optimized for wideband transmit signal paths in communication systems. It delivers 79 dBc SFDR at 5 MHz output, supports 2–20 mA full-scale current adjustment, and integrates a 1.20 V bandgap reference. Used in direct IF basestation transmitters and DDS instrumentation.
For engineers reviewing the AD9752ARUZRL7 datasheet, AD9752ARUZRL7 pinout, AD9752ARUZRL7 application, or AD9752ARUZRL7 equivalent, key selection criteria include update rate (125 MSPS), differential current output compliance (±1.0 V to +1.25 V), SFDR performance across clock rates (25–125 MSPS), and TSSOP-28 package compatibility with other TxDAC family members.
Technical Context
The AD9752ARUZRL7 employs a segmented PMOS current source architecture with 31 MSB sources, 15 middle-bit sources (1/16×MSB), and binary-weighted LSB sources-avoiding R-2R ladders to preserve high output impedance (>100 kΩ) and multitone linearity. Its proprietary differential switch design minimizes timing skew and glitch impulse (5 pV·s).
Dual-supply operation separates analog (AVDD = 4.5–5.5 V) and digital (DVDD = 2.7–5.5 V) domains; edge-triggered CMOS latches support 125 MSPS updates with 2.0 ns setup and 1.5 ns hold time. The integrated reference control amplifier enables 10:1 full-scale current tuning (2–20 mA) while maintaining <±1.0 LSB DNL over temperature.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - Enables 4096 discrete output levels for high-fidelity waveform synthesis. |
| Max Update Rate | 125 MSPS - Supports Nyquist-limited IF signals up to 62.5 MHz in direct-conversion transmitters. |
| SFDR @ 5 MHz | 79 dBc - Ensures clean spectral purity for 16-QAM/64-QAM modulation in wireless basestations. |
| Full-Scale Current | 2–20 mA adjustable - Allows power scaling from 65 mW (2 mA) to 185 mW (20 mA) without performance loss. |
| Output Compliance | –1.0 V to +1.25 V - Defines safe voltage swing range for IOUTA/IOUTB when driving 50 Ω loads or transformers. |
| Reference Voltage | 1.20 V ±60 mV - On-chip bandgap reference enables self-contained operation or external reference override via REFIO. |
| Power-Down Mode | 20 mW - Reduces standby consumption by 90% vs. active mode, critical for burst-mode wireless protocols. |
Pinout & Package
AD9752ARUZRL7 is housed in a 28-lead TSSOP (RU-28) package, 4.4 mm × 9.7 mm, 0.65 mm pitch, thermally enhanced for industrial temperature operation (–40°C to +85°C). Pin 1 is DB11 (MSB); pins 13, 14, 19, and 25 are no-connect; SLEEP is active-high power-down control referenced to AVDD.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DB11–DB0 | Digital data inputs (12-bit parallel) | CMOS-compatible inputs accepting 2.7–5.5 V logic; latched on CLOCK rising edge. |
| CLOCK | Input clock | Edge-triggered master clock; determines maximum update rate (125 MSPS) and timing margins. |
| IOUTA / IOUTB | Differential current outputs | Complementary outputs: IOUTA = (CODE/4096)×IOUTFS; IOUTB = ((4095−CODE)/4096)×IOUTFS. |
| REFIO | Reference input/output | Provides 1.20 V output when internal reference enabled (REFLO = ACOM); accepts external reference when REFLO = AVDD. |
| FS ADJ | Full-scale current control node | Connects to external RSET to set IOUTFS = 32 × (VREFIO/RSET); enables 20 dB gain range. |
| SLEEP | Power-down enable | Active-high logic input; reduces supply current to ~4–8 mA and power to 20 mW in standby. |
Key Features
| Feature | Design Value |
|---|---|
| Segmented current source architecture | Eliminates R-2R ladder nonlinearities; maintains >100 kΩ output impedance for stable transformer coupling. |
| Proprietary differential switch design | Reduces glitch impulse to 5 pV·s and improves SFDR by >5 dB vs. prior-generation DACs at 100 MSPS. |
| On-chip 1.20 V bandgap reference | Drift ≤±50 ppm/°C; allows single-supply operation without external reference components in cost-sensitive designs. |
| Wide full-scale current adjustability | 2–20 mA range via RSET; supports system-level gain control and dynamic power scaling without hardware change. |
| Separate AVDD/DVDD supplies | Enables independent noise isolation: analog section (4.5–5.5 V) and digital interface (2.7–5.5 V) operate at optimal voltages. |
Applications
| Direct IF Basestation Transmitter | Digital Radio Link Modulator |
|---|---|
Use Scenario: Transmitting 16-QAM signals at 45 MHz IF in LTE macrocell basestations using zero-IF or low-IF architecture. IC Role / Device Role / Timing Role: Primary current-output DAC generating baseband I/Q waveforms fed into quadrature modulator. Use Value: 79 dBc SFDR at 5 MHz ensures adjacent channel leakage ratio (ACLR) meets 3GPP TS 36.104 requirements without post-DAC filtering. | Use Scenario: High-reliability point-to-point microwave backhaul operating at 11 GHz with 256-QAM modulation. IC Role / Device Role / Timing Role: DAC in DDS-based frequency synthesizer generating precise local oscillator waveforms. Use Value: 125 MSPS update rate enables direct synthesis of 62.5 MHz bandwidth signals, reducing mixer count and phase noise. |
| Wireless Local Loop (WLL) CPE | Test & Measurement Signal Generator |
Use Scenario: Subscriber unit in fixed wireless access systems transmitting OFDM symbols at 2.4 GHz ISM band. IC Role / Device Role / Timing Role: Transmit-path DAC converting digital baseband samples to analog current for upconversion. Use Value: Adjustable 2–20 mA full-scale current allows matching to variable PA input impedance while maintaining SFDR >75 dBc. | Use Scenario: Benchtop arbitrary waveform generator requiring low-distortion, wideband output (DC–60 MHz). IC Role / Device Role / Timing Role: Core DAC in AWG signal path, driving transformer-coupled 50 Ω output stage. Use Value: Differential current outputs simplify balanced output design; >100 kΩ output impedance prevents loading of precision op-amps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed DAC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9754ARUZ | 14-bit resolution, same 125 MSPS rate, identical TSSOP-28 pinout and reference architecture. | Higher resolution suits radar pulse shaping and high-order QAM where SNR >75 dB required. | Select AD9754ARUZ when 14-bit accuracy is mandatory; AD9752ARUZRL7 remains optimal for cost-sensitive 12-bit IF transmission. |
| MAX5895ETX+ | 12-bit, 1.6 GSPS, LVDS interface, 68-pin TQFN; no integrated reference; higher power (550 mW). | Targets ultra-wideband applications (e.g., 5G FR2) requiring >500 MHz Nyquist bandwidth. | Choose MAX5895ETX+ only when >125 MSPS is essential; AD9752ARUZRL7 offers superior SFDR per watt in sub-100 MHz IF bands. |
Compared with AD9754ARUZ and MAX5895ETX+, AD9752ARUZRL7 delivers best-in-class SFDR/power tradeoff for 12-bit, 125 MSPS IF generation-enabling compact, thermally efficient basestation CPE designs without sacrificing spectral purity.
Availability
AD9752ARUZRL7 is available at Aetrix Electronics and suitable for wireless basestation transmitters, digital radio link modulators, wireless local loop customer premises equipment, and test & measurement signal generators requiring stable component supply and industrial temperature support.
Supply support for AD9752ARUZRL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and DSP technologies, serving communications, industrial, and instrumentation markets since 1965.
The AD9752ARUZRL7 belongs to the TxDAC® family-designed specifically for transmit signal chains in wireless infrastructure, emphasizing SFDR, power efficiency, and pin compatibility across 8–14-bit resolutions.
FAQ
What is the maximum clock frequency supported by the AD9752ARUZRL7?
The AD9752ARUZRL7 supports a maximum update rate of 125 MSPS, verified under AVDD = +5 V, DVDD = +5 V, and IOUTFS = 20 mA conditions. At this rate, it achieves 76 dBc SFDR at 5 MHz output and maintains monotonicity with <±1.0 LSB DNL across –40°C to +85°C. Clock input (pin 28) must meet 3.5 ns minimum pulse width and be referenced to DCOM.
How does the AD9752ARUZRL7 achieve its 79 dBc SFDR at 5 MHz?
The AD9752ARUZRL7 achieves 79 dBc SFDR at 5 MHz through a combination of segmented PMOS current sources, proprietary differential switching that minimizes timing skew, and on-chip 1.20 V reference stability (±50 ppm/°C). Measured with differential transformer-coupled 50 Ω termination, this performance holds at 0 dBFS output and fCLOCK = 100 MSPS per the AD9752 datasheet Rev. 0, page 3.
Can the AD9752ARUZRL7 operate with an external reference voltage?
Yes, the AD9752ARUZRL7 supports external reference operation: tie REFLO (pin 16) to AVDD to disable the internal 1.20 V reference, then apply a stable external voltage (0.1–1.25 V) to REFIO (pin 17). The reference input resistance is 1 MΩ, and small-signal bandwidth is 0.5 MHz-suitable for gain-control DACs like the AD7524 in single-supply configurations.
What is the purpose of the FS ADJ pin on the AD9752ARUZRL7?
The FS ADJ pin (pin 18) connects to an external resistor RSET to set the full-scale output current IOUTFS = 32 × (VREFIO/RSET). With VREFIO = 1.20 V, RSET values from 60 Ω (20 mA) to 600 Ω (2 mA) enable 20 dB gain adjustment while preserving SFDR >75 dBc. This pin directly controls power dissipation (65–185 mW) and output drive capability.
Does the AD9752ARUZRL7 require decoupling capacitors on its power supplies?
Yes, the AD9752ARUZRL7 requires 0.1 µF ceramic capacitors from AVDD (pin 24) to ACOM (pin 20), DVDD (pin 27) to DCOM (pin 26), and REFIO (pin 17) to REFLO (pin 16) when using the internal reference. ICOMP (pin 23) also requires a 0.1 µF capacitor to ACOM. These ensure stable biasing of the current source array and reference amplifier per Figure 18 and functional description on page 10.
AD9752ARUZRL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- TxDAC®
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Number of Bits:
- 12
- Number of D/A Converters:
- 1
- Settling Time:
- 35ns (Typ)
- Output Type:
- Current - Unbuffered
- Differential Output:
- Yes
- Data Interface:
- Parallel
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- INL/DNL (LSB):
- ±0.5, ±0.25
- Architecture:
- Current Source
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 28-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD9752ARUZRL7 FAQ
1.How can I place an order for AD9752ARUZRL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9752ARUZRL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9752ARUZRL7 reliable?
The price and inventory of AD9752ARUZRL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9752ARUZRL7 is usually 5 days.
3.What payment methods are accepted for AD9752ARUZRL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9752ARUZRL7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9752ARUZRL7?
AD9752ARUZRL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9752ARUZRL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9752ARUZRL7?
For technical support, including AD9752ARUZRL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9752ARUZRL7 requirements.
6.How does Aetrix verify that AD9752ARUZRL7 is sourced from the original manufacturer or authorized distributors?
All AD9752ARUZRL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9752ARUZRL7 meets industry standards.
7.What is the process for return or replacement of AD9752ARUZRL7?
All AD9752ARUZRL7 units undergo pre-shipment inspection (PSI). If there is an issue with AD9752ARUZRL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9752ARUZRL7 part is unused and in its original packaging.
Return procedure for AD9752ARUZRL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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