Analog Devices Inc. AD977CRS
- Part No.:
- AD977CRS
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
AD977CRS.pdf
- Description:
- IC ADC 16BIT SAR 28SSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD977CRS from Analog Devices is a 16-bit, 100 kSPS successive-approximation ADC operating from a single 5 V supply, featuring internal 2.5 V reference, ±10 V/0 V–5 V input ranges, and high-speed serial interface in a 20-lead SOIC package. It delivers ±3 LSB INL, 83 dB SNR, and 100 mW max power dissipation for precision data acquisition in industrial instrumentation.
For engineers reviewing the AD977CRS datasheet, AD977CRS pinout, AD977CRS application, or AD977CRS equivalent, this page provides verified specifications, real-world timing behavior, package-specific layout guidance, and validated alternative options for system-level design and BOM optimization.
Technical Context
The AD977CRS implements a factory-calibrated switched-capacitor SAR architecture with on-chip clock generation and dual-mode serial interface (internal or external DATACLK). Its conversion control relies on R/C and CS signals, supporting both continuous and discontinuous clock modes with SYNC frame synchronization when EXT/INT = HIGH.
It supports unipolar (0 V–10 V, 0 V–5 V, 0 V–4 V) and bipolar (±10 V, ±5 V, ±3.3 V) input ranges via external resistor networks, and includes power-down mode (50 µW) with 1 ms recovery to rated accuracy after wake-up using a 2.2 µF capacitor on CAP.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit - delivers 305 µV LSB step size at ±10 V full scale for high-precision sensor and process monitoring. |
| Throughput Rate | 100 kSPS - enables real-time sampling of signals up to 700 kHz full-power bandwidth without aliasing in control-loop applications. |
| INL (Max) | ±3 LSB - ensures monotonicity and <0.05% end-point linearity error across temperature for calibrated measurement systems. |
| SNR | 83 dB - supports >13.5 ENOB for accurate digitization of low-noise analog signals such as strain gauge or RTD outputs. |
| Power Dissipation | 100 mW max - compatible with thermally constrained industrial enclosures and enables passive cooling in space-limited designs. |
| Reference | Internal 2.5 V ±2% (2.48 V–2.52 V) - eliminates need for external reference IC while maintaining ±0.5% full-scale error over temperature. |
| Input Ranges | ±10 V, ±5 V, ±3.3 V, 0 V–10 V, 0 V–5 V, 0 V–4 V - configurable via external resistors per Table 8, enabling reuse across multiple sensor signal conditioning topologies. |
Pinout & Package
AD977CRS is packaged in a 20-lead skinny SOIC (SOIC_N) with 0.3" body width and standard JEDEC MS-013AC footprint. Thermal resistance θJA = 75°C/W supports operation up to +85°C ambient without forced airflow.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| R1IN, R2IN, R3IN | Analog Input Terminals | Three dedicated inputs configured via external resistor networks to select unipolar/bipolar range and gain; impedance matched for stable sampling. |
| CAP | Reference Buffer Output | Requires 2.2 µF tantalum capacitor to AGND2 to stabilize internal reference buffer; critical for <1 LSB drift during conversion cycles. |
| REF | Reference I/O | Provides internal 2.5 V reference or accepts external 2.3 V–2.7 V source; must be decoupled with 2.2 µF capacitor to AGND2. |
| SB/BTC | Data Format Select | Logic LOW → two's complement output; HIGH → straight binary; determines firmware interpretation of MSB-first serial stream. |
| EXT/INT | Serial Clock Mode Select | LOW → internal DATACLK generation; HIGH → external DATACLK sync; defines whether SYNC output is active and timing control strategy. |
| DATACLK | Serial Clock I/O | Output (EXT/INT = LOW) or input (EXT/INT = HIGH); data valid on both edges in internal mode; requires t12 ≥ 66 ns period in external mode. |
| DATA | Serial Data Output | MSB-first 16-bit stream synchronized to DATACLK; holds TAG state between conversions; latched into shift register upon BUSY rising edge. |
| BUSY | Conversion Status Flag | Active-low open-drain output; LOW during conversion (≤8 µs for AD977), HIGH when result is ready in shift register and safe to read. |
| PWRD | Power-Down Control | Logic HIGH disables conversion and reduces current to 10 µA; previous result remains in shift register for readout post-wake-up. |
Key Features
| Feature | Design Value |
|---|---|
| Factory-Calibrated SAR Core | Eliminates need for user calibration; guarantees ±3 LSB INL and ±2 LSB DNL across –40°C to +85°C without trimming. |
| Single 5 V Supply Operation | Reduces bill-of-materials by removing dual-rail supplies; separates analog (VANA) and digital (VDIG) domains with independent ground pins (AGND1, AGND2, DGND). |
| High-Speed Serial Interface | Supports up to 15.15 MHz DATACLK in external mode; enables direct FPGA or microcontroller connection without parallel bus logic. |
| Configurable Input Ranges | Hardware-selectable unipolar/bipolar ranges via R1IN/R2IN/R3IN resistor networks-no software reconfiguration required for different sensor types. |
| Power-Down Recovery | Resumes full accuracy within 1 ms after PWRD deassertion using 2.2 µF CAP capacitor; suitable for duty-cycled data loggers. |
Applications
| Industrial Process Monitoring | Automated Test Equipment (ATE) |
|---|---|
|
Use Scenario: Continuous voltage/current monitoring of PLC analog I/O modules with ±10 V sensor inputs and 100 kSPS sampling requirement. IC Role / Device Role / Timing Role: Primary 16-bit digitizer capturing transducer outputs; uses internal clock mode with CS tied low and R/C toggled per sample. Use Value: Delivers 83 dB SNR and ±3 LSB INL to resolve sub-millivolt changes in 4–20 mA loop receivers without external amplification. |
Use Scenario: DC parametric testing of semiconductor devices requiring precise voltage stimulus and digitized response capture at 100 kSPS. IC Role / Device Role / Timing Role: High-accuracy front-end ADC in PXI-based ATE; operates in external DATACLK mode with SYNC for multi-board synchronization. Use Value: Enables deterministic readout timing and daisy-chained DATA lines via TAG pin, reducing interconnect count in multi-channel test fixtures. |
| Medical Instrumentation | Energy Metering Reference Design |
|
Use Scenario: Digitizing ECG amplifier outputs in portable diagnostic equipment where low power and bipolar ±5 V range are mandatory. IC Role / Device Role / Timing Role: Low-noise, battery-conscious ADC; leverages PWRD mode between heartbeat intervals to achieve <100 µW average power. Use Value: Maintains 13.5+ ENOB during active sampling and recovers to full accuracy in 1 ms-critical for transient waveform fidelity. |
Use Scenario: High-precision voltage channel in Class 0.2 polyphase energy meter, interfacing with isolation amplifiers and anti-alias filters. IC Role / Device Role / Timing Role: Metrology-grade ADC accepting 0 V–5 V isolated secondary outputs; uses internal reference and unipolar configuration. Use Value: Internal 2.5 V reference drift ≤±7 ppm/°C ensures long-term calibration stability without periodic recalibration in field-deployed meters. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8688IPWR | 16-bit, 500 kSPS, SPI interface, integrated PGA, 2.5 V reference, 24-QFN package | Higher throughput and on-chip programmable gain; requires PCB redesign due to QFN footprint and different pinout | Choose for systems needing >100 kSPS or variable-gain front-end; not drop-in due to interface and layout differences |
| MAX11270ETJ+ | 16-bit, 125 kSPS, sigma-delta architecture, 2.5 V reference, 32-TQFN, built-in oscillator | Superior 92 dB SNR but slower effective throughput; no external clock dependency; higher pin count | Prefer for ultra-low-noise DC measurements where oversampling is acceptable; incompatible serial protocol and timing model |
Compared with ADS8688IPWR and MAX11270ETJ+, the AD977CRS offers proven 100 kSPS performance in legacy SOIC layouts, minimal external components (no PGA or oscillator needed), and deterministic SAR latency-making it optimal for cost-sensitive, space-constrained industrial retrofits.
Availability
AD977CRS is available at Aetrix Electronics and suitable for industrial process monitoring, automated test equipment, and medical instrumentation requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for AD977CRS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The AD977CRS belongs to Analog Devices' precision SAR ADC product line, designed specifically for high-accuracy, medium-speed data acquisition in thermally and electrically noisy environments where dc accuracy and repeatability are critical.
FAQ
What is the maximum sampling rate supported by the AD977CRS?
The AD977CRS supports a maximum throughput rate of 100 kSPS, corresponding to a complete conversion cycle time of 10 µs. This is specified for all grade options (A/B/C) across the –40°C to +85°C temperature range and is guaranteed with single 5 V supply operation and internal clock mode. The AD977CRS does not support the 200 kSPS rate-that is exclusive to the AD977A variant.
Does the AD977CRS require an external reference voltage?
No, the AD977CRS includes a factory-trimmed internal 2.5 V reference (2.48 V to 2.52 V) that meets full-scale error and drift specifications without external components. An external reference (2.3 V–2.7 V) may be used via the REF pin to improve system-level accuracy, but it is optional-not required-for baseline operation. The internal reference supports ±0.5% full-scale error over temperature.
How is the input range configured on the AD977CRS?
The AD977CRS supports six input ranges (±10 V, ±5 V, ±3.3 V, 0 V–10 V, 0 V–5 V, 0 V–4 V) through external resistor networks connected to R1IN, R2IN, and R3IN pins as defined in Table 8 of the datasheet. No register writes or digital configuration are needed-the range is set entirely by hardware topology, enabling robust, glitch-free range selection in harsh industrial settings.
Can the AD977CRS operate in power-down mode and retain its last conversion result?
Yes, asserting PWRD HIGH places the AD977CRS into 50 µW power-down mode while preserving the most recent conversion result in the internal shift register. After PWRD is deasserted, the device recovers to full accuracy in 1 ms (with 2.2 µF capacitor on CAP) and the stored result remains accessible via the serial interface-enabling low-duty-cycle sensing without data loss.
What are the key timing constraints for reading data using an external DATACLK?
When using external DATACLK (EXT/INT = HIGH), the AD977CRS requires t12 ≥ 66 ns minimum period, t13 ≥ 20 ns high time, and t14 ≥ 30 ns low time. Data is valid on the falling edge of DATACLK (t18 ≤ 66 ns setup), and SYNC pulse width equals one DATACLK period. These values are strictly defined in Table 4 and must be met to ensure reliable 16-bit readout without bit errors.
AD977CRS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 100k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- SPI
- Configuration:
- ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD977CRS FAQ
1.How can I place an order for AD977CRS through Aetrix?
Please submit a Request for Quotation (RFQ) for AD977CRS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD977CRS reliable?
The price and inventory of AD977CRS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD977CRS is usually 5 days.
3.What payment methods are accepted for AD977CRS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD977CRS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD977CRS?
AD977CRS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD977CRS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD977CRS?
For technical support, including AD977CRS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD977CRS requirements.
6.How does Aetrix verify that AD977CRS is sourced from the original manufacturer or authorized distributors?
All AD977CRS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD977CRS meets industry standards.
7.What is the process for return or replacement of AD977CRS?
All AD977CRS units undergo pre-shipment inspection (PSI). If there is an issue with AD977CRS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD977CRS part is unused and in its original packaging.
Return procedure for AD977CRS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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