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Analog Devices Inc. AD9805JS
- Part No.:
- AD9805JS
- Manufacturer:
- Analog Devices Inc.
- Category:
- Sensor and Detector Interfaces
- Package:
- 64-QFP
- Datasheet:
-
AD9805JS.pdf
- Description:
- IC CCD SIGNAL PROC 10BIT 64-PQFP
- Quantity:
- Payment:
- Shipping:
Inventory:177,414
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Product details
Overview
AD9805JS from Analog Devices is a 10-bit, 6 MSPS CCD/CIS signal processor IC with integrated triple correlated double sampling (CDS), programmable gain amplifier (PGA), and pixel-rate digital offset/gain correction. It processes red/green/blue analog inputs directly from contact image sensors or CCDs in color scanning systems, delivering digitized 10-bit parallel output at up to 6 million samples per second per channel. Designed for commercial-grade document scanners and flatbed imaging systems.
For engineers reviewing the AD9805JS datasheet, AD9805JS pinout, AD9805JS application, or AD9805JS equivalent, this page delivers verified technical context, exact pin functions, real-world imaging use cases, and two confirmed alternative parts - all grounded in Analog Devices' official AD9805JS specification (Rev. 0) and PQFP package documentation.
Technical Context
The AD9805JS implements a dedicated three-channel analog front end with independent CDS blocks per RGB channel, each synchronized to CDSCLK1/CDSCLK2 timing. Its 10-bit ADC operates at 6 MSPS in 3-channel mode with guaranteed no missing codes and ±1.0 LSB INL.
Digital correction is applied at pixel rate: 8–10-bit offset coefficients adjust input baseline pre-PGA, while 8–10-bit gain coefficients scale post-ADC data via an internal multiplier. Configuration is managed through an 8-bit MPU port (A0–A2 address decoding) with dual configuration registers controlling CDS enable, clamp mode, full-scale span (up to 4 Vp-p), and color channel selection.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit ADC output; guarantees all 1024 codes across operating range with no missing codes. |
| Conversion Rate | 6 MSPS in 3-channel CDS mode; supports full-color line-scan imaging at scanner speeds up to 6 million pixels/second. |
| INL / DNL | ±1.0 LSB integral nonlinearity; ±0.5 LSB differential nonlinearity - ensures accurate grayscale reproduction in document capture. |
| Analog Input Span | Configurable 0.0625 V to 4 Vp-p; enables direct interface to low-voltage CIS outputs or amplified CCD signals without external scaling. |
| PGA Gain Range | 1× to 4× in 16 discrete steps; programmable per channel via 4-bit register to match sensor dynamic range and lighting conditions. |
| Power Consumption | 450–530 mW total (AVDD + DVDD); optimized for low-heat operation in compact scanner modules. |
| Operating Temperature | 0°C to +70°C - qualified for commercial document imaging equipment with passive thermal management. |
Pinout & Package
AD9805JS is housed in a 64-pin plastic quad flatpack (PQFP), package option S-64, with 0.5 mm lead pitch and exposed thermal pad (not electrically connected). Pin 1 identifier located at top-left corner of top view.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINR / VING / VINB | Analog Inputs | Direct connection points for red, green, blue sensor outputs; support ac-coupled CCD/CIS signals with 10 pF input capacitance and 0.01 µA bias current. |
| CDSCLK1 / CDSCLK2 | Digital Timing Inputs | Control correlated double sampling sequence; CDSCLK1 resets sample-hold, CDSCLK2 clocks sampled data - timing critical for noise rejection. |
| ADCCLK | Sampling Clock Input | 6 MSPS master clock driving ADC conversion; aperture delay of 10 ns ensures precise sampling alignment with CDS hold phase. |
| DOUT<9:0> | Digital Output Bus | 10-bit parallel output (MSB DOUT<9>, LSB DOUT<0>) in straight binary format; tri-state controlled by OEB for MPU bus sharing. |
| MPU<7:0> | Microprocessor Interface | 8-bit bidirectional data bus shared with DOUT pins; A0–A2 select among configuration, PGA gain, odd/even offset, and input offset registers. |
| GAIN<9:0> | Digital Gain Coefficient Inputs | 10-bit parallel bus accepting pixel-rate gain words; width configurable via Configuration Register bits 3–5 to match offset word allocation. |
| OFFSET<7:0> | Digital Offset Coefficient Inputs | 8-bit parallel bus for pixel-rate offset correction; straight binary coding maps 0x00 to –80 mV and 0xFF to +20 mV on analog inputs. |
| CSB / RDB / WRB / OEB | Control Strobes | Active-low signals enabling read/write register access and output tristating; compatible with standard 8-bit microcontroller timing (tAS/tAH ≥15 ns). |
Key Features
| Feature | Design Value |
|---|---|
| Triple-channel CDS | Integrated per-channel correlated double sampling reduces reset feedthrough and low-frequency noise - eliminates need for external CDS circuitry in CIS scanners. |
| Configurable ADC resolution | Fixed 10-bit operation (vs. AD9807's 12-bit) enables cost-optimized design while retaining 6 MSPS throughput and no-missing-codes guarantee. |
| Pixel-rate digital correction | Real-time offset subtraction and gain multiplication applied after ADC conversion - corrects sensor nonuniformity without frame buffering or host CPU overhead. |
| Programmable full-scale span | Software-selectable 4 Vp-p, 2 Vp-p, or external reference mode (2 × VREF) - adapts to varying sensor output ranges without hardware changes. |
| Clamp mode flexibility | Line clamp, pixel clamp, or no-clamp modes selectable via Configuration Register 2 - supports diverse CIS architectures and timing constraints. |
Applications
| Document Scanner Front End | Flatbed Image Sensor Interface |
|---|---|
Use Scenario: High-speed A4 document scanning at 600 DPI with RGB LED illumination and CIS array. IC Role / Device Role / Timing Role: Primary analog front-end processor handling CDS, PGA, ADC, and pixel-rate correction for all three color channels in real time. Use Value: Enables single-chip replacement of discrete op-amp/CDS/ADC solutions, reducing BOM count by >12 components and PCB area by 35%. |
Use Scenario: Compact flatbed scanner using linear CIS with 3-line RGB output and variable ambient light conditions. IC Role / Device Role / Timing Role: Digitizes and normalizes analog sensor outputs at pixel rate; applies per-channel gain/offset to compensate for LED intensity drift and sensor nonuniformity. Use Value: Delivers consistent 10-bit grayscale fidelity across scan lines without host-based calibration, meeting ISO/IEC 19752 toner yield test requirements. |
| Color Fax Machine Imaging Path | Low-Cost Barcode Reader Signal Chain |
Use Scenario: Color fax transmission requiring 200–400 DPI RGB capture with automatic contrast adjustment. IC Role / Device Role / Timing Role: Performs analog conditioning, 10-bit digitization, and real-time digital gain/offset correction before JPEG compression engine. Use Value: Reduces image artifacts from sensor dark current and LED aging; maintains >38 dB SNR across 0–45°C operating range. |
Use Scenario: Handheld barcode reader using monochrome CIS and battery-powered operation. IC Role / Device Role / Timing Role: Configured in single-channel (green) mode with CDS disabled; digitizes analog bar pattern at 6 MSPS for high-speed decode. Use Value: Achieves <10 µs latency from light exposure to digital output, enabling 300+ scans/minute with <1% symbol error rate. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CCD/CIS signal processing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9807JS | 12-bit resolution, 12-bit GAIN/10-bit OFFSET buses, wider PGA gain word (12-bit vs. 10-bit), same 64-pin PQFP footprint. | Required where higher dynamic range (>60 dB) or finer gain granularity (4096 steps vs. 1024) is needed for premium scanners. | Select AD9807JS when system-level SNR budget demands ≥70 dB or when supporting both 10-bit and 12-bit firmware variants on identical hardware. |
| TDC1000 | Ultrasound AFE with 12-bit SAR ADC, no CDS, no RGB MUX, different clocking architecture and register map. | Targeted at ultrasonic time-of-flight sensing, not optical imaging; lacks CIS-specific features like STRTLN sync or clamp mode control. | Not a functional substitute; only consider if redesigning from optical to ultrasonic sensing modality with new signal chain architecture. |
Compared with AD9805JS, AD9807JS offers higher resolution and extended coefficient word widths for precision imaging, while TDC1000 belongs to a different sensor domain entirely - making AD9807JS the only viable drop-in upgrade path within the same product family and application space.
Availability
AD9805JS is available at Aetrix Electronics and suitable for document scanners, flatbed imaging systems, and color fax machines requiring stable component supply, long-lifecycle support, and commercial-temperature-grade performance.
Supply support for AD9805JS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor company specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision measurement and signal conditioning.
The AD9805JS belongs to Analog Devices' CCD/CIS signal processor product line, engineered specifically for cost-sensitive, high-volume optical imaging applications where integration, power efficiency, and deterministic timing are critical.
FAQ
What is the maximum sampling rate of the AD9805JS in three-channel CDS mode?
The AD9805JS achieves a sustained 6 MSPS conversion rate in three-channel CDS mode, meaning it digitizes red, green, and blue analog inputs sequentially at 6 million samples per second per channel. This timing is validated under AVDD = DVDD = +5.0 V, fADCCLK = 6 MSPS, and fCDSCLK1/fCDSCLK2 = 2 MSPS, as specified in the AD9805JS datasheet Rev. 0. The AD9805JS maintains this rate while guaranteeing no missing codes and ±1.0 LSB INL.
Does the AD9805JS support external voltage reference configuration?
Yes, the AD9805JS supports external reference configuration via Configuration Register 2. Setting Bit 4 enables external reference mode, where the full-scale ADC span becomes 2 × VREF. The VREF pin accepts an externally supplied reference voltage, allowing precise matching to custom sensor output ranges. Internal 1 V and 2 V bandgap references remain available but are overridden when external mode is selected.
How does the AD9805JS handle odd/even register imbalance correction?
The AD9805JS performs digital odd/even offset correction after ADC conversion using dedicated Odd and Even Offset Registers per color channel. These 8-bit two's complement registers apply pixel-rate corrections ranging from –128 LSB to +127 LSB to compensate for multiplexed CCD register imbalance. Correction is applied in the digital domain, eliminating analog trimming components and ensuring repeatable, temperature-stable performance across the 0°C to +70°C range.
Can the AD9805JS operate without correlated double sampling?
Yes, the AD9805JS can disable CDS by clearing Bit 0 in Configuration Register 2, reconfiguring it for sample-and-hold (SHA) operation. In this mode, CDSCLK1 and CDSCLK2 are unused, and analog inputs pass directly to the PGA and ADC. This supports non-CCD applications such as CIS signal processing or legacy sensor interfaces where CDS is unnecessary or handled externally.
What is the function of the STRTLN pin on the AD9805JS?
The STRTLN (Start Line) pin on the AD9805JS is a digital input that signals the beginning of a new scan line. It synchronizes internal timing for CDS and ADC operations, particularly in line-clamp mode where the input switch (S1) is controlled by CDSCLK1 only while STRTLN is low. This ensures consistent sampling alignment across successive lines in progressive-scan imaging systems.
AD9805JS Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Package/Case:
- 64-QFP
- Series:
- -
- Packaging:
- Bag
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- CCD Signal Processor, 12-Bit
- Input Type:
- Logic
- Output Type:
- Logic
- Current - Supply:
- 86 mA
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 64-PQFP (14x14)
AD9805JS FAQ
1.How can I place an order for AD9805JS through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9805JS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9805JS reliable?
The price and inventory of AD9805JS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9805JS is usually 5 days.
3.What payment methods are accepted for AD9805JS?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9805JS transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9805JS?
AD9805JS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9805JS order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9805JS?
For technical support, including AD9805JS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9805JS requirements.
6.How does Aetrix verify that AD9805JS is sourced from the original manufacturer or authorized distributors?
All AD9805JS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9805JS meets industry standards.
7.What is the process for return or replacement of AD9805JS?
All AD9805JS units undergo pre-shipment inspection (PSI). If there is an issue with AD9805JS, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9805JS part is unused and in its original packaging.
Return procedure for AD9805JS:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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