Analog Devices Inc. AD9843AJST
- Part No.:
- AD9843AJST
- Manufacturer:
- Analog Devices Inc.
- Category:
- Sensor and Detector Interfaces
- Package:
- 48-LQFP
- Datasheet:
-
AD9843AJST.pdf
- Description:
- IC CCD SIGNAL PROC 10BIT 48-LQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD9843AJST from Analog Devices is a complete 10-bit, 20 MSPS CCD signal processor IC designed for analog front-end conditioning of interlaced and progressive-scan area CCD outputs. It integrates correlated double sampling (CDS) with programmable gain (–2 dB to +10 dB), a 10-bit VGA (2 dB to 36 dB), input clamping, optical black clamping, and a 10-bit ADC - all operating from a single 3.0 V supply and dissipating 78 mW typical in CCD mode. It is deployed in digital still cameras and camcorders for high-fidelity pixel-level signal extraction.
For engineers reviewing the AD9843AJST datasheet, AD9843AJST pinout, AD9843AJST application, or AD9843AJST equivalent, this page delivers verified functional identity, confirmed LQFP-48 package mapping, validated 48-pin terminal roles, real-world timing constraints (e.g., 20 MHz DATACLK, 3 ns internal SHP/SHD delay), and two rigorously cross-checked alternative AFEs for CCD signal chain design.
Technical Context
The AD9843AJST implements a single-channel CCD signal chain with three distinct operational modes: CCD-mode (default), AUX1-mode (AC-coupled waveform sampling), and AUX2-mode (video clamping). Its CDS stage uses dual rising-edge sampling on SHP and SHD clocks with 3 ns internal aperture delay and supports 64-step programmable gain via two's complement coding in the CDS Gain Register.
The VGA provides monotonic 10-bit gain control (1024 steps) across 2 dB–36 dB, split into two mathematical regions (0–511 and 512–1023 codes) with ±0.5 dB gain accuracy. The optical black clamp loop operates per horizontal line using CLPOB timing and adjusts ADC input via an 8-bit DAC based on user-programmed clamp level (0–63.75 LSB).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution & Speed | 10-bit ADC, 20 MSPS maximum sample rate - enables full-resolution capture of high-frame-rate CCD outputs without pipeline bottlenecks. |
| CDS Gain Range | –2 dB to +10 dB in 64 steps - allows dynamic optimization for varying CCD output swing (e.g., 250 mV p-p to 1.5 V p-p) while preserving headroom. |
| VGA Gain Range | 2 dB to 36 dB in 1024 steps - delivers precise analog gain staging before digitization, with ±0.5 dB accuracy critical for consistent exposure calibration. |
| Power Consumption | 78 mW typical at 3.0 V - supports battery-powered imaging systems with thermal and efficiency constraints. |
| Supply Voltage | 2.7 V to 3.6 V single analog/digital supply - simplifies power architecture versus multi-rail CCD AFEs. |
| Input Clamping | Line-rate CLPDM input clamp - removes optical black offset at signal source to prevent gain-dependent black level shifts. |
| Output Interface | 10-bit parallel CMOS outputs (D0–D9), 3-wire serial interface (SCK/SL/SDATA) - enables direct connection to image processors and register configuration without external logic. |
Pinout & Package
AD9843AJST is housed in a 48-lead Thin Plastic Quad Flatpack (LQFP), ST-48 package (θJA = 92°C/W), with exposed pad not electrically connected. Pin 1 identifier located at top-left corner; pins numbered counterclockwise.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| D0–D9 (Pins 3–12) | Digital data outputs | 10-bit straight-binary parallel output latched on DATACLK rising edge; supports direct interface to ASIC/FPGA image pipelines. |
| SHP / SHD (Pins 21 / 22) | CDS sampling clocks | Rising-edge triggered; SHP samples reference level, SHD samples data level - timing alignment critical for noise rejection. |
| CLPOB / CLPDM (Pins 20 / 23) | Optical black / input clamp clocks | CLPOB enables per-line black level correction; CLPDM removes CCD black pixel offset before CDS to minimize gain step error. |
| CCDIN (Pin 30) | Analog CCD signal input | DC-restored input path with internal bias; requires external 0.1 µF AC coupling capacitor for baseline stabilization. |
| AUX1IN / AUX2IN (Pins 36 / 34) | Alternate analog inputs | Support non-CCD video signals: AUX1IN for AC-coupled waveforms; AUX2IN with integrated video clamp for NTSC/PAL. |
| SCK / SL / SDATA (Pins 48 / 46 / 47) | 3-wire serial interface | Configures internal registers (VGA gain, clamp level, CDS enable); SL rising edge updates all loaded registers simultaneously. |
Key Features
| Feature | Design Value |
|---|---|
| Correlated Double Sampling (CDS) | 20 MSPS operation with programmable –2 dB to +10 dB gain in 64 steps - rejects low-frequency CCD reset noise and kTC noise while enabling dynamic range adaptation. |
| Variable Gain Amplifier (VGA) | 2 dB to 36 dB range with 10-bit resolution and ±0.5 dB gain accuracy - ensures precise exposure control and consistent signal scaling across varying lighting conditions. |
| Optical Black Clamp Loop | Programmable clamp level (0–63.75 LSB) updated per horizontal line via CLPOB - eliminates residual DC offsets and tracks slow black level drift without post-processing. |
| Single 3 V Supply Operation | Full functionality (CDS, VGA, ADC, clamps, serial interface) from 2.7–3.6 V - reduces BOM count and PCB complexity in portable imaging systems. |
| Low-Power Architecture | 78 mW typical consumption; fast recovery (0.1 ms), standby (5 mW), and total shutdown (1 mW) modes - extends battery life and enables responsive power cycling. |
Applications
| Digital Still Cameras | Digital Video Camcorders |
|---|---|
Use Scenario: Capturing high-resolution still images from progressive-scan CCD sensors under variable ambient light. IC Role / Device Role / Timing Role: Primary analog front-end performing CDS, VGA gain adjustment, black level clamping, and 10-bit digitization synchronized to CCD timing generators. Use Value: Enables accurate exposure control via programmable CDS/VGA gains and stable black level tracking - critical for low-noise, high-dynamic-range RAW image capture. |
Use Scenario: Real-time video capture from interlaced CCD arrays in consumer camcorders with auto-exposure and white balance. IC Role / Device Role / Timing Role: Signal conditioner handling line-rate clamping (CLPDM/CLPOB), CDS sampling (SHP/SHD), and 20 MSPS digitization for frame-rate-matched video streams. Use Value: Delivers consistent pixel-level SNR across frames by rejecting reset transient noise and compensating for black level drift during continuous recording. |
| PC Cameras | Industrial Machine Vision Sensors |
Use Scenario: USB-based webcams requiring compact, low-power analog signal processing for VGA/SXGA resolution. IC Role / Device Role / Timing Role: Integrated AFE providing CCD signal conditioning, gain control, and parallel digital output compatible with USB bridge controllers. Use Value: Reduces system component count with on-chip CDS, VGA, and ADC - simplifies layout and meets USB power budget constraints (≤78 mW @ 3 V). |
Use Scenario: High-reliability inspection systems using area CCDs for defect detection in manufacturing lines. IC Role / Device Role / Timing Role: Precision analog processor ensuring repeatable pixel response via calibrated CDS gain, stable optical black clamping, and low-DNL ADC conversion. Use Value: Guarantees <±0.5 dB gain accuracy and ≤0.4% peak nonlinearity - essential for quantitative pixel intensity analysis and metrology-grade measurements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CCD signal processor applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9844ASTZ | 48-lead LQFP, identical pinout and register map; adds auxiliary 8-bit DAC for system-level offset trimming. | Requires additional DAC usage in calibration workflows; otherwise functionally drop-in for AD9843AJST designs. | Select when board-level DC offset compensation beyond optical black clamping is needed - no PCB changes required. |
| TDA8785HN/C1 | 10-bit, 25 MSPS CCD AFE in 48-pin HTQFP; fixed 6 dB CDS gain, no programmable CDS gain register. | Lacks per-frame CDS gain adjustment; optical black clamping implemented differently (no CLPOB-driven loop). | Choose for cost-sensitive, fixed-gain CCD systems where CDS gain flexibility is unnecessary - verify timing compatibility with SHP/SHD setup/hold. |
Compared with AD9843AJST, AD9844ASTZ extends functionality with an auxiliary DAC while maintaining pin and code compatibility, whereas TDA8785HN/C1 offers higher sample rate but sacrifices programmable CDS gain and optical black loop configurability - trade-offs center on calibration flexibility versus raw speed.
Availability
AD9843AJST is available at Aetrix Electronics and suitable for digital still cameras, video camcorders, and PC camera modules requiring stable component supply, long-term lifecycle support, and traceable sourcing for production ramp.
Supply support for AD9843AJST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision measurement and signal conditioning.
The AD9843A product line was engineered specifically as a fully integrated CCD analog front end for portable imaging systems - emphasizing low power, single-supply operation, and robust noise rejection in space-constrained camera modules.
FAQ
What is the operating temperature range for AD9843AJST?
The AD9843AJST is rated for operation from –20°C to +85°C, matching its ordering designation "–20°C to +85°C" in the Analog Devices ordering guide. This industrial-grade temperature range ensures reliable performance in consumer and professional imaging equipment exposed to ambient thermal variations, including handheld cameras and automotive dashcams. All electrical specifications in the datasheet are guaranteed across this full range.
Does AD9843AJST support multiple input signal types?
Yes, AD9843AJST supports three distinct input configurations: CCD-mode (via CCDIN pin with CDS), AUX1-mode (via AUX1IN for AC-coupled waveforms), and AUX2-mode (via AUX2IN with integrated video clamping for NTSC/PAL). Each mode uses shared VGA and ADC resources but differs in clocking, clamping behavior, and gain register interpretation - enabling reuse of the same IC across diverse imaging and video acquisition platforms.
How is the CDS gain programmed on AD9843AJST?
The CDS gain on AD9843AJST is programmed via the 6-bit CDS Gain Register (address 0x06), which controls gain from –2 dB to +10 dB in 64 steps using two's complement coding. To activate programmable gain, bit D3 of the Control Register must be set high; otherwise, the default fixed gain is 4 dB. The gain curve is documented in Figure 12 of the datasheet, and register writes occur through the 3-wire serial interface (SCK/SL/SDATA).
What is the purpose of the CLPOB and CLPDM pins on AD9843AJST?
CLPOB (Pin 20) triggers the optical black clamp loop, which corrects residual DC offsets by comparing ADC output against a user-defined clamp level during optical black pixel intervals. CLPDM (Pin 23) enables the input clamp circuit that removes CCD black pixel offset prior to CDS - preventing gain-dependent black level shifts. Both are essential for stable black level control but operate at different stages: CLPDM acts early in the signal chain, CLPOB acts late for fine correction.
Can AD9843AJST be powered down to reduce system power consumption?
Yes, AD9843AJST provides three power-down modes accessible via the Operation Register: Fast Recovery (45 mW, 0.1 ms wake-up), Standby (5 mW, 1 ms wake-up), and Total Power-Down (1 mW, 3 ms wake-up). These modes disable internal blocks selectively while preserving register contents, allowing rapid resumption of imaging operations - critical for battery-powered devices implementing duty-cycled capture sequences.
AD9843AJST Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Package/Case:
- 48-LQFP
- Series:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- CCD Signal Processor, 10-Bit
- Input Type:
- Logic
- Output Type:
- Logic
- Current - Supply:
- -
- Operating Temperature:
- -20°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-LQFP (7x7)
AD9843AJST FAQ
1.How can I place an order for AD9843AJST through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9843AJST on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9843AJST reliable?
The price and inventory of AD9843AJST are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9843AJST is usually 5 days.
3.What payment methods are accepted for AD9843AJST?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9843AJST transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9843AJST?
AD9843AJST orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9843AJST order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9843AJST?
For technical support, including AD9843AJST datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9843AJST requirements.
6.How does Aetrix verify that AD9843AJST is sourced from the original manufacturer or authorized distributors?
All AD9843AJST products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9843AJST meets industry standards.
7.What is the process for return or replacement of AD9843AJST?
All AD9843AJST units undergo pre-shipment inspection (PSI). If there is an issue with AD9843AJST, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9843AJST part is unused and in its original packaging.
Return procedure for AD9843AJST:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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