Analog Devices Inc. AD9860BST

Overview

AD9860BST from Analog Devices is a mixed-signal front-end (MxFE™) IC optimized for broadband communications, integrating dual 10-bit 64 MSPS ADCs and dual 12-bit 128 MSPS DACs in a single 128-lead LQFP package. It supports real, diversity, or I/Q baseband/low-IF receive paths and complex/real transmit up-conversion with programmable gain amplifiers, Hilbert filters, decimation/interpolation, and a DLL-based clock multiplier - enabling compact cable modem and wireless infrastructure designs.

For engineers reviewing the AD9860BST datasheet, AD9860BST pinout, AD9860BST application, or AD9860BST equivalent, this page delivers verified specifications including 64 MSPS ADC sampling rate, 128 MSPS DAC update rate, 20 dB RxPGA/TxPGA gain range, 128-lead LQFP package mapping, and confirmed alternative parts for broadband MxFE system design.

Technical Context

The AD9860BST implements a fully integrated dual-channel transceiver architecture: its receive path includes input buffers with 200 Ω differential impedance, programmable gain amplifiers (±0.3 dB gain error), 10-bit ADCs with 59.0–60.66 dB SNR at 5 MHz, and configurable digital filters (decimation + Hilbert). Its transmit path features two 12-bit current-output DACs with 20 mA full-scale output, ±0.5 LSB DNL, 70.6 dBc wideband SFDR at 1 MHz, and digitally tunable quadrature mixers.

Timing is synchronized via a programmable delay-locked loop (DLL) supporting 32–128 MHz output clocks from a single crystal or external reference; auxiliary resources include three 8-bit DACs, two 10-bit ADCs, and SPI register control - all operating across –40°C to +70°C with analog/digital supply separation (AVDD = 3.3 V, DVDD = 3.3 V).

Key Specifications

Pinout & Package

AD9860BST is housed in a 128-lead Low Profile Plastic Quad Flatpack (LQFP), ST-128B package with exposed thermal pad. Pin functions are validated per Analog Devices AD9860/AD9862 Rev. 0 datasheet (pp. 6–7).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar mixed-signal front-end applications.

Compared with AD9862BST, the AD9860BST trades 2-bit resolution for lower power (307 mA vs. 307+12 mA Rx path) and cost, making it optimal for cost-sensitive CPE. Against MAX2022ETM+, AD9860BST delivers complete MxFE functionality in one chip - reducing PCB area, BOM count, and firmware development effort for broadband modem applications.

Availability

AD9860BST is available at Aetrix Electronics and suitable for cable modems, fixed wireless access units, VDSL line cards, and WLAN baseband processors requiring stable component supply, long-term industrial temperature support, and proven mixed-signal integration.

Supply support for AD9860BST includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and ISO 9001-certified manufacturing.

The AD9860BST belongs to Analog Devices' MxFE™ (Mixed-Signal Front-End) product line, engineered specifically for broadband communications infrastructure - emphasizing integration, dynamic performance, and low-power operation in space-constrained modems and wireless base stations.

FAQ

What is the maximum sampling rate supported by the AD9860BST ADC?

The AD9860BST supports a maximum ADC sampling rate of 64 MSPS, validated across the full industrial temperature range (–40°C to +70°C). This rate enables digitization of baseband or low-IF signals up to 32 MHz bandwidth, meeting requirements for DOCSIS, VDSL2, and fixed wireless standards. The ADC latency is 7 clock cycles when all digital processing blocks are disabled, ensuring deterministic timing for real-time signal processing.

Does the AD9860BST include an integrated clock generator?

Yes, the AD9860BST integrates a programmable delay-locked loop (DLL) clock multiplier that generates internal clocks for ADC, DAC, and digital logic from a single external crystal or clock source. It provides two programmable clock outputs (CLKOUT1 and CLKOUT2) ranging from 32 MHz to 128 MHz, with duty cycle stability of 50% ±5%. This eliminates the need for external clock synthesizers in broadband modem designs.

What are the key differences between AD9860BST and AD9862BST?

The AD9860BST uses 10-bit ADCs and 12-bit DACs, while the AD9862BST upgrades to 12-bit ADCs and 14-bit DACs - delivering higher SNR (62.6 dB vs. 59.0 dB at 5 MHz) and SFDR (83–90 dBc narrowband). Both share identical pinout, package (128-lead LQFP), SPI register map, and functional blocks; however, AD9862BST draws ~12 mA more current in active Rx mode and requires recalibration of gain tables due to improved linearity.

Can the AD9860BST operate in half-duplex mode at extended temperature?

Yes, the AD9860BST is characterized to operate over –40°C to +85°C when configured in half-duplex mode, exceeding its standard –40°C to +70°C rating. This extended range is validated per the AD9860/AD9862 Ordering Guide (Rev. 0, p. 5) and enables deployment in outdoor fixed wireless units exposed to ambient thermal cycling without derating.

What auxiliary functions does the AD9860BST provide beyond main ADC/DAC paths?

The AD9860BST includes three 8-bit auxiliary DAC outputs (AUX_DAC_A–C), two 10-bit auxiliary ADC inputs (AUX_ADC_A1/A2, B1/B2) with dual multiplexed channels, and a programmable sigma-delta output (SIGDELT). These support system-level monitoring (e.g., temperature, supply voltage), bias control for external components, and digital signal dithering - all accessible via the same SPI interface used for main path configuration.