Analog Devices Inc. AD9925BBCZ
- Part No.:
- AD9925BBCZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Sensor and Detector Interfaces
- Package:
- 96-LFBGA, CSPBGA
- Datasheet:
-
AD9925BBCZ.pdf
- Description:
- IC CCD SIGNAL PROCESSOR 96CSPBGA
- Quantity:
- Payment:

- Shipping:

Inventory:978
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Product details
Overview
AD9925BBCZ from Analog Devices is a complete 36 MHz CCD signal processor with integrated 10-channel vertical driver and Precision Timing™ generator. It performs correlated double sampling (CDS), 6 dB to 42 dB VGA gain control, black level clamping, and 12-bit analog-to-digital conversion - all in a single 8 mm × 8 mm CSPBGA package. It serves as the front-end imaging solution for digital still cameras and CCD camera modules requiring precise timing synchronization and high-voltage vertical clock generation.
For engineers reviewing the AD9925BBCZ datasheet, AD9925BBCZ pinout, AD9925BBCZ application, or AD9925BBCZ equivalent, this page delivers verified functional identity, confirmed 96-pin CSPBGA mapping, real-world timing resolution (<600 ps at 36 MHz), validated V-driver output capability (±7.5 V to +15 V), and two documented alternative parts for CCD timing subsystem replacement.
Technical Context
The AD9925BBCZ integrates an analog front end (AFE) and fully programmable timing generator (AFETG) on one die, supporting both master and slave timing modes via HD/VD sync inputs. Its Precision Timing core divides the 36 MHz CLI input into 48 edge positions, enabling sub-nanosecond adjustment of RG, H1–H4, SHP, and SHD clocks with fixed 6 ns internal delay from CLI rising edge.
It features register compatibility with AD9991 and AD9995, supports 3-field (6-phase) CCDs with two additional vertical outputs, and delivers programmable 2-phase or 4-phase horizontal clocking. The V-driver supplies up to +15 V and −7.5 V, with 3-level (V1–V5) and 2-level (V4–V8) outputs, each with defined rise/fall times (500 ns typ) and load-driven current capability (±10 mA).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ADC Resolution | 12-bit, delivering 4096 discrete output levels for high-fidelity pixel digitization. |
| VGA Gain Range | 6 dB to 42 dB in 1024 monotonic steps, enabling precise analog signal scaling across varying CCD output amplitudes. |
| Precision Timing Resolution | <600 ps at 36 MHz operation, allowing fine-grained alignment of CDS sampling edges relative to CCD reset transients. |
| Vertical Driver Outputs | 10 channels: 6 × 3-level (V1–V5A/B), 4 × 2-level (V4/V6–V8), plus SUBCK and VSUB - directly driving CCD vertical transfer gates without external level-shifting. |
| Supply Voltage Ranges | AVDD/TCVDD/HVDD/RGVDD/DVDD/DRVDD: 2.7 V to 3.6 V; VH: up to +15 V; VL: down to −7.5 V - enabling mixed-signal and high-voltage CCD interface on one IC. |
| Operating Temperature | −25°C to +85°C, qualified for industrial and consumer imaging environments including camcorders and embedded camera modules. |
| Package | 96-lead CSPBGA, 8 mm × 8 mm, 0.65 mm pitch - optimized for compact, high-density PCB layouts in space-constrained optical modules. |
Pinout & Package
AD9925BBCZ is housed in an 8 mm × 8 mm CSPBGA package with 0.65 mm pitch and 96 solder balls. Pin functions are fully defined per Analog Devices Rev. A datasheet (pages 9–10), including dedicated power domains (HVDD, RGVDD, AVDD, TCVDD, DVDD, DRVDD, VDVDD, VH1/VH2, VM1/VM2, VL), ground planes (HVSS, RGVSS, AVSS, TCVSS, DVSS, DRVSS, VDVSS), and function-specific I/O (CCDIN, DOUT[0:11], DCLK, H1–H4, RG, V1–V8, SUBCK, VSUB, SYNC, CLI, CLO, MSHUT, STROBE, HD, VD, RSTB, SL, SCK, SDI).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| H1–H4, RG | CCD Horizontal Clock Outputs | High-voltage (up to 3.6 V swing) drivers for CCD horizontal readout; programmable edge timing and polarity. |
| V1–V8, SUBCK, VSUB | CCD Vertical Transfer Outputs | 10-channel V-driver with 3-level (±7.5 V to +15 V) and 2-level configurations; supports 3-field CCD architectures and electronic shutter control. |
| CCDIN | Analog Input | Differential-capable input for CCD analog video signal; includes internal CDS and black level clamp circuitry. |
| DOUT[0:11], DCLK | Digital Output Bus | 12-bit parallel LVCMOS data stream synchronized to DCLK; supports 36 MHz pixel rate with pipeline-aligned sampling. |
| CLI, CLO | Master Clock Interface | CLI accepts 36 MHz reference clock; CLO provides inverted output for crystal oscillator drive - enabling self-contained clock generation. |
| RSTB, SL, SCK, SDI | 3-Wire Serial Control | Asynchronous active-low reset (RSTB) and SPI-like interface (SL/SCK/SDI) for programming internal registers including timing, gain, and clamp settings. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 10-channel V-driver | Eliminates need for external high-voltage level shifters and discrete drivers - reduces BOM count and layout complexity in CCD camera modules. |
| Precision Timing™ core | Enables <600 ps clock edge resolution at 36 MHz, critical for minimizing CDS sampling jitter and maximizing SNR in low-light imaging. |
| Correlated Double Sampler (CDS) | Removes reset noise and fixed-pattern noise from CCD output before amplification - essential for achieving >60 dB dynamic range. |
| 12-bit 36 MHz ADC | Digitizes analog pixel data with guaranteed no missing codes and ±0.5 LSB DNL - preserves tonal gradation and avoids banding artifacts. |
| On-chip horizontal/vertical drivers | Drives H1–H4, RG, and 10 vertical clocks directly from internal supplies - removes external gate drivers and simplifies power sequencing. |
Applications
| Digital Still Camera | Digital Video Camcorder |
|---|---|
Use Scenario: High-resolution still capture using interlaced or progressive scan CCD sensors with mechanical shutter control. IC Role / Device Role / Timing Role: AD9925BBCZ acts as full front-end signal processor and timing controller - generating all CCD clocks (RG, H1–H4, V1–V8), performing CDS/VGA/ADC, and synchronizing MSHUT pulses. Use Value: Enables single-chip integration of analog signal chain and precision timing, reducing system latency and eliminating external clock distribution skew. | Use Scenario: Continuous video recording with rolling shutter compensation and electronic exposure control. IC Role / Device Role / Timing Role: AD9925BBCZ operates in slave mode using external HD/VD sync, providing programmable vertical timing for field-based readout and shutter timing coordination. Use Value: Supports variable frame rates and exposure times via register-controlled SHP/SHD edge placement - critical for auto-exposure algorithms in camcorders. |
| CCD Camera Module | Industrial Machine Vision System |
Use Scenario: Compact OEM camera module for surveillance or medical endoscopy with minimal board area and thermal footprint. IC Role / Device Role / Timing Role: AD9925BBCZ serves as the sole timing and AFE IC - integrating V-driver, H-driver, CDS, VGA, clamp, and ADC in 8 mm × 8 mm CSPBGA. Use Value: Reduces total component count by >15 devices versus discrete solutions, improving reliability and easing FCC/EMC compliance. | Use Scenario: High-speed inspection system requiring precise inter-frame timing, consistent gain calibration, and low-noise analog capture. IC Role / Device Role / Timing Role: AD9925BBCZ delivers stable 12-bit digitization with 0.8 LSB rms noise and 50 dB PSR - maintaining measurement repeatability across supply fluctuations. Use Value: Guarantees <600 ps timing resolution and monotonic VGA gain for pixel-level intensity matching across multi-camera setups. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar CCD signal processing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9995BCPZ | Same AFETG architecture and register map, but lacks integrated V-driver; requires external 10-channel driver IC. | Suitable where board space allows separate V-driver placement and higher design flexibility is needed. | Select AD9995BCPZ only if vertical clock voltage requirements exceed AD9925BBCZ's ±7.5 V/+15 V range or if modular timing/AFE partitioning is preferred. |
| TDA9984HN/C1 | Video encoder with HDMI output; no CDS, VGA, or CCD timing generation - not a functional substitute. | Designed for post-processing digital video streams, not analog CCD front-end acquisition. | Not recommended as direct alternative; only relevant in systems where AD9925BBCZ output feeds a downstream encoder like TDA9984HN/C1. |
Compared with AD9995BCPZ, AD9925BBCZ integrates the V-driver to reduce component count and timing skew, while TDA9984HN/C1 serves a fundamentally different signal chain stage - making AD9925BBCZ irreplaceable in CCD analog acquisition roles.
Availability
AD9925BBCZ is available at Aetrix Electronics and suitable for digital still cameras, CCD camera modules, and industrial machine vision systems requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for AD9925BBCZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor company specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision measurement and control applications.
The AD9925BBCZ belongs to Analog Devices' CCD signal processor product line, designed specifically to consolidate analog front-end functions and high-resolution timing generation for professional and consumer imaging systems using interline or frame-transfer CCD sensors.
FAQ
What is the primary function of the AD9925BBCZ in a CCD imaging system?
The AD9925BBCZ serves as a complete front-end solution for CCD sensors, integrating correlated double sampling (CDS), 6 dB to 42 dB variable gain amplification, black level clamping, 12-bit analog-to-digital conversion, and a fully programmable Precision Timing™ generator with 10-channel vertical driver. In the AD9925BBCZ, all these functions operate cohesively to digitize and condition analog CCD output while generating precise, synchronized clocks for sensor readout - eliminating the need for multiple discrete ICs.
Does the AD9925BBCZ support both master and slave timing modes?
Yes, the AD9925BBCZ supports both master and slave timing modes. In master mode, it generates HD and VD sync signals internally from the CLI clock; in slave mode, it accepts external HD and VD inputs to synchronize its internal timing generators. This dual-mode capability allows the AD9925BBCZ to adapt to diverse system architectures - whether controlled by an image processor ASIC or operating autonomously with an external crystal oscillator.
What voltage ranges does the AD9925BBCZ V-driver support for CCD vertical clocking?
The AD9925BBCZ V-driver supports three voltage rails: VH1/VH2 up to +15.0 V, VM1/VM2 at 0 V (typical), and VL1/VL2 down to −7.5 V. These enable 3-level outputs (e.g., V1, V3A/B, V5A/B) spanning −7.5 V to +15.0 V and 2-level outputs (e.g., V4, V6–V8) between −7.5 V and 0 V. This range matches standard interline CCD requirements and is explicitly verified in the AD9925BBCZ datasheet Table 3 under Vertical Driver Specifications.
How is timing precision achieved in the AD9925BBCZ, and what is its resolution?
The AD9925BBCZ achieves timing precision through its proprietary Precision Timing™ core, which divides the 36 MHz CLI input into 48 discrete edge positions per pixel period - yielding <600 ps resolution at full speed. This is confirmed in the AD9925BBCZ General Description (page 1) and Timing Specifications (page 7), where tCLIDLY is specified as 6 ns typ and edge placement is programmable in 1/48th increments of the CLI period.
Can the AD9925BBCZ drive CCD clocks directly without external level-shifting components?
Yes, the AD9925BBCZ can drive CCD clocks directly without external level shifters. Its integrated H-drivers (H1–H4, RG) operate from HVDD/RGVDD (2.7 V to 3.6 V) and deliver up to 30 mA output current, while its V-driver outputs (V1–V8, SUBCK, VSUB) support rail voltages from −7.5 V to +15.0 V. This capability is validated in the AD9925BBCZ datasheet sections "Vertical Driver Specifications" (page 5) and "Functional Block Diagram" (page 2), confirming direct connection to standard CCD sensor pins.
AD9925BBCZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Package/Case:
- 96-LFBGA, CSPBGA
- Series:
- -
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- CCD Signal Processor, 12-Bit
- Input Type:
- Logic
- Output Type:
- Logic
- Current - Supply:
- -
- Operating Temperature:
- -25°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 96-CSPBGA (8x8)
AD9925BBCZ FAQ
1.How can I place an order for AD9925BBCZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9925BBCZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9925BBCZ reliable?
The price and inventory of AD9925BBCZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9925BBCZ is usually 5 days.
3.What payment methods are accepted for AD9925BBCZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9925BBCZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9925BBCZ?
AD9925BBCZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9925BBCZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9925BBCZ?
For technical support, including AD9925BBCZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9925BBCZ requirements.
6.How does Aetrix verify that AD9925BBCZ is sourced from the original manufacturer or authorized distributors?
All AD9925BBCZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9925BBCZ meets industry standards.
7.What is the process for return or replacement of AD9925BBCZ?
All AD9925BBCZ units undergo pre-shipment inspection (PSI). If there is an issue with AD9925BBCZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9925BBCZ part is unused and in its original packaging.
Return procedure for AD9925BBCZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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