Analog Devices Inc. AD9961-EBZ

Overview

AD9961-EBZ from Analog Devices is an evaluation board designed to accelerate functional validation of the AD9961 dual-channel, 12-bit, 50 MSPS mixed-signal transceiver IC - supporting simultaneous transmit (DAC) and receive (ADC) operation with configurable digital interfaces (TxPort, TRxPort), on-board LDOs, and 3.3 V logic supply. It enables rapid characterization of DAC output spectra, ADC input response, interpolation/decimation paths, and SPI-controlled analog/digital signal chain configuration.

For engineers reviewing the AD9961-EBZ datasheet, AD9961-EBZ pinout, AD9961-EBZ application, or AD9961-EBZ equivalent, this page delivers verified hardware setup guidance, interface mode selection (SDR/DDR, Full/Half-Duplex), clock doubler vs. DLL configuration, DAC full-scale current (2 mA), ADC sampling rate (50 MSPS), and DPG-compatible data capture workflows - all critical for RF transceiver prototyping in communications and instrumentation.

Technical Context

The AD9961-EBZ implements a complete signal chain interface for the AD9961 transceiver, including SMA-connected analog I/Q DAC outputs (J7, J8) and ADC inputs (J1, J3), a 50 MHz main clock input (J13), and USB-powered control via SPI. It supports both DPG2 and DPGI/O pattern generators for stimulus and capture, with factory-configured jumpers enabling internal LDO regulation and 3.3 V logic levels.

Digital interface flexibility includes TxPort (dedicated transmit), TRxPort (bidirectional half-duplex), and configurable bus timing (CLKPhase/IQPhase adjustment), interpolation filters (2× SRRC + two 2× FIR), decimation (×2), and post-filter scaling - all controllable via the AD9961 SPI application and VisualAnalog software suite.

Key Specifications

Availability

AD9961-EBZ is available at Aetrix Electronics and suitable for RF transceiver development, high-speed data converter validation, and mixed-signal system integration requiring stable component supply, traceable sourcing, and long-term evaluation board availability.

Supply support for AD9961-EBZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, serving communications, industrial, automotive, and instrumentation markets with precision data converters, amplifiers, and RF solutions.

The AD9961-EBZ belongs to Analog Devices' high-speed transceiver evaluation platform family, engineered specifically to de-risk adoption of the AD9961 dual-channel 12-bit 50 MSPS transceiver in wireless infrastructure, software-defined radio, and test equipment applications.

FAQ

What is the AD9961-EBZ used for?

The AD9961-EBZ is an evaluation board for the AD9961 transceiver IC, enabling rapid functional verification of its dual 12-bit DACs and ADCs, digital interface modes (TxPort/TRxPort), interpolation/decimation filters, and SPI-configurable analog signal chain. It supports DPG2 and DPGI/O pattern generators for stimulus and capture, and integrates on-board LDOs and factory-set jumpers for immediate 3.3 V operation.

Which software tools are required to operate the AD9961-EBZ?

To operate the AD9961-EBZ, you must install the DAC Software Suite (including the AD9961 SPI application), DPGDownloader (for vector formatting and loading), and VisualAnalog (for ADC data capture and FFT analysis). VisualAnalog must be installed before the DAC Software Suite if evaluating the AD9961-EBZ receive path. All tools are available from analog.com/dpg and analog.com/visualanalog.

How do I configure the AD9961-EBZ for half-duplex TRxPort operation?

To configure the AD9961-EBZ for half-duplex TRxPort operation, use the AD9961 SPI application: set Interface to TRxDPG under LDO/Transceiver > Control Lines, disable OE_N, then switch to Dig Interface > Bus Configuration and select Half-Duplex mode. Ensure DPGDownloader is configured for TRXPORT bus mode and 3.3 V IO voltage. Factory jumper settings (JP1–JP6, JP8, JP16) already enable required LDOs and logic levels.

What clocking options does the AD9961-EBZ support for the AD9961 IC?

The AD9961-EBZ supports two primary clocking architectures for the AD9961: the 50% Duty Cycle Clock Doubler (recommended for 13–70 MHz input clocks) and the Configurable Delay-Locked Loop (DLL) for precise multiplication/division (e.g., 20 MHz ×10 ÷3 = 66.67 MHz DAC clock). Both require a clean 50 MHz main clock at J13, with duty cycle correction disabled for <75 MHz operation per AD9961-EBZ documentation.

Can the AD9961-EBZ evaluate both transmit and receive functions simultaneously?

Yes - the AD9961-EBZ can evaluate both transmit and receive functions simultaneously when paired with a DPGI/O pattern generator. The DPGI/O connects to the board's TRxPort to inject data into the DACs while capturing ADC output data. Transmit-only evaluation uses DPG2 or DPGI/O; receive-only requires DPGI/O and VisualAnalog. All configurations rely on the AD9961 SPI application to configure interface modes, clocking, and signal processing paths on the AD9961-EBZ.