Analog Devices Inc. AD9980KSTZ-95

Overview

AD9980KSTZ-95 from Analog Devices is a monolithic 8-bit, 95 MSPS analog video interface IC optimized for digitizing RGB and YPbPr signals in HDTV and advanced display systems. It integrates triple ADCs, PLL-based pixel clock generation (10–95 MHz), auto-offset calibration, 4:4:4/4:2:2/DDR output formatting, and programmable clamp/gain/phase control. Its 200 MHz full-power analog bandwidth supports XGA (1024×768@85 Hz) and all HDTV modes.

For engineers reviewing the AD9980KSTZ-95 datasheet, AD9980KSTZ-95 pinout, AD9980KSTZ-95 application, or AD9980KSTZ-95 equivalent, key selection criteria include guaranteed 95 MSPS conversion rate, ≤980 ps p-p PLL jitter at full rate, dual-channel 2:1 mux support for redundant sync sources, 3.3 V/1.8 V dual-supply operation, and Pb-free 80-pin LQFP packaging with validated thermal resistance (θJA = 35°C/W).

Technical Context

The AD9980KSTZ-95 implements a fully integrated analog front-end with three independent 8-bit ADC channels, each featuring programmable gain amplifiers, auto-offset correction, and dc restoration via internal or external clamp control. Its PLL generates pixel clocks from Hsync (RGB) or three-level sync (YPbPr), with 32-step phase adjustment and coast mode to sustain frequency during sync loss.

Digital outputs include parallel 8-bit RED/GREEN/BLUE buses with configurable drive strength, DATACK-strobed timing, HSOUT/VSOUT reconstruction, SOGOUT slicing, and O/E FIELD detection. All configuration and status monitoring occur via a 100 kHz I²C-compatible serial interface with 29 registers covering gain, offset, polarity, sync processing, and PLL divider control.

Key Specifications

Pinout & Package

AD9980KSTZ-95 is housed in an 80-pin, Pb-free, LQFP surface-mount package (12 mm × 12 mm, 0.5 mm pitch) with exposed thermal pad. Pin assignments are validated per Analog Devices Rev. 0 datasheet Figure 2 and Table 3.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog video interface applications.

Compared with AD9980KSTZ-95, AD9983AKSTZ trades integrated PLL convenience for higher speed and bandwidth but increases system clock complexity, while THS8200IPHP offers greater resolution and sync processing depth at the cost of calibration flexibility and direct firmware compatibility.

Availability

AD9980KSTZ-95 is available at Aetrix Electronics and suitable for advanced TV receivers, HDTV set-top boxes, and LCD monitor controllers requiring stable component supply, long-term lifecycle assurance, and full-temperature-range performance validation.

Supply support for AD9980KSTZ-95 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD9980 belongs to Analog Devices' Display Interface product line, engineered specifically for high-fidelity digitization of analog video signals in consumer and professional display systems operating up to 95 MSPS.

FAQ

What is the maximum guaranteed conversion rate for AD9980KSTZ-95?

The AD9980KSTZ-95 is specified for a maximum conversion rate of 95 MSPS across its full operating temperature range (0°C to +70°C), as confirmed in Table 1 of the Rev. 0 datasheet. This rate is validated with ≤980 ps p-p PLL jitter and maintains differential nonlinearity within 0.6–1.5 LSB. The AD9980KSTZ-95 achieves this performance using its integrated PLL and internal reference, eliminating dependency on external clock sources for standard operation.

Does AD9980KSTZ-95 support both RGB and YPbPr video formats?

Yes, AD9980KSTZ-95 natively supports both RGB graphics and YPbPr component video through its triple 8-bit ADC architecture and flexible sync processing. For RGB, it locks the PLL to Hsync; for YPbPr, it uses three-level sync detection. The device's 2:1 input mux per channel, SOGIN inputs, and programmable sync polarity registers allow seamless adaptation to either format without hardware modification. All functional blocks-including clamp, gain, and offset-are independently configurable per channel in AD9980KSTZ-95.

How does the auto-offset feature function in AD9980KSTZ-95?

The auto-offset feature in AD9980KSTZ-95 performs real-time calibration of dc level mismatches between the red, green, and blue ADC channels by measuring and correcting baseline offsets during blanking intervals. Enabled via serial register control, it restores signal reference levels automatically without host processor intervention. This ensures consistent color balance across varying input sources and temperature drift, directly improving image fidelity in AD9980KSTZ-95-based display systems.

What power supply configurations are required for AD9980KSTZ-95?

AD9980KSTZ-95 requires four independent supplies: VD = 3.3 V (analog core), VDD = 1.8–3.3 V (digital outputs), PVD = 1.8 V (PLL domain), and DAVDD = 1.8 V (digital logic). Each has defined current limits-e.g., ID = 240 mA (VD), IPVD = 8 mA-and must be decoupled per the PCB Layout Recommendations in the datasheet. The separation prevents noise coupling from high-speed outputs into sensitive analog and clock circuits, a critical requirement validated in AD9980KSTZ-95 thermal and jitter testing.

Is AD9980KSTZ-95 pin-compatible with other members of the AD9980 family?

No, AD9980KSTZ-95 is not pin-compatible with AD9980KSTZ-80 (80 MSPS variant) due to differing output drive strength requirements and associated internal biasing. While both share the same 80-pin LQFP package and pinout mapping, the AD9980KSTZ-95 is characterized and tested specifically at 95 MSPS with drive strength = 1, whereas AD9980KSTZ-80 uses drive strength = 0. Using them interchangeably may result in timing violations or signal integrity issues. Always verify drive settings and register initialization for AD9980KSTZ-95 in final design.