Analog Devices Inc. AD9984AKSTZ-140

Overview

AD9984AKSTZ-140 from Analog Devices is a 10-bit, 140 MSPS triple analog-to-digital converter optimized for digitizing RGB and YPbPr video signals in display interface applications. It integrates a PLL-based pixel clock generator, auto-offset calibration, channel-to-channel gain matching, and programmable output drive strength. Designed for HDTV capture up to 1080p and UXGA graphics (1600 × 1200 @ 60 Hz), it operates with 1.8 V analog and 3.3 V digital supplies.

For engineers reviewing the AD9984AKSTZ-140 datasheet, AD9984AKSTZ-140 pinout, AD9984AKSTZ-140 application, or AD9984AKSTZ-140 equivalent, key selection criteria include its 140 MSPS conversion rate, 300 MHz full-power analog bandwidth, tri-channel 10-bit ADC architecture, integrated sync processing for SOG and composite sync, and support for 80-lead LQFP packaging with 3.3 V CMOS-compatible I/O.

Technical Context

The AD9984AKSTZ-140 implements three independent 10-bit ADCs with internal PGA, clamp control, and auto-calibration for offset and gain mismatch across R/G/B channels. Its on-chip PLL accepts tri-level sync (YPbPr) or Hsync (RGB) inputs to generate a stable 10–140 MHz sampling clock with 32-step phase adjustment and low jitter at 140 MSPS.

Digital interface includes a 2-wire I²C serial port (SDA/SCL) for register configuration, programmable output formats (4:4:4, 4:2:2, DDR), and dedicated control pins for power-down (PWRDN), external clamp (CLAMP), and coast/EXTCK functionality. Output timing maintains fixed relationships among DATACK, HSOUT, and parallel RGB data streams.

Key Specifications

Pinout & Package

The AD9984AKSTZ-140 is packaged in an 80-lead Pb-free LQFP (Low Profile Quad Flat Package) with exposed pad, optimized for thermal dissipation and board-level reliability in display interface modules.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog video digitizer applications.

Compared with AD9984AKCPZ-140, the AD9984AKSTZ-140 offers easier prototyping and thermal inspection due to its LQFP package, while AD9983AKSTZ trades performance and feature depth for lower cost and power-making the AD9984AKSTZ-140 optimal for mid-to-high-end HDTV and professional display interfaces demanding full 1080p support and robust sync handling.

Availability

AD9984AKSTZ-140 is available at Aetrix Electronics and suitable for advanced TV input processing, plasma display digitization, and LCD monitor signal acquisition requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for AD9984AKSTZ-140 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design and manufacturing expertise spanning over 50 years.

The AD9984A product line was developed specifically for high-fidelity analog video digitization in consumer and professional display systems, emphasizing integration of clock recovery, calibration, and sync processing to simplify front-end design for HDTV and graphics applications.

FAQ

What is the maximum pixel clock frequency supported by the AD9984AKSTZ-140?

The AD9984AKSTZ-140 supports a maximum PLL clock rate of 140 MHz, enabling digitization of video formats up to 1080p and UXGA (1600 × 1200 at 60 Hz). This is confirmed in Table 1 of the Rev. A datasheet under "Maximum PLL Clock Rate" for the AD9984AKSTZ-140 variant. The device achieves this with low jitter and 32-step phase adjustment to optimize sampling point placement.

Does the AD9984AKSTZ-140 support sync-on-green (SOG) processing?

Yes, the AD9984AKSTZ-140 includes dedicated SOGIN0/SOGIN1 inputs and an internal SOG slicer with programmable threshold (8–256 mV above negative peak). SOGOUT provides selectable outputs including raw SOGINx, filtered Hsync, or regenerated sync. This capability is explicitly documented in the Functional Block Diagram, General Description, and Pin Function Descriptions for the AD9984AKSTZ-140.

What power supply voltages are required for the AD9984AKSTZ-140?

The AD9984AKSTZ-140 requires four distinct supply rails: VD = 1.8 V (analog core), VDD = 1.8–3.3 V (digital outputs), PVD = 1.8 V (PLL), and DAVDD = 1.8 V (digital logic). These values are specified in Table 1 (Electrical Characteristics) and Pin Function Descriptions for the AD9984AKSTZ-140, with absolute maximum ratings confirming 1.98 V for VD/PVD/DAVDD and 3.6 V for VDD.

How does the auto-offset calibration function in the AD9984AKSTZ-140?

The AD9984AKSTZ-140's auto-offset feature automatically restores signal reference levels and calibrates out DC offset differences between the R, G, and B channels during blanking intervals. Enabled via serial register control, it operates independently per channel and is validated in the General Description and Table 1 (Offset Adjustment Range = ±50% FS) for the AD9984AKSTZ-140.

Is the AD9984AKSTZ-140 pin-compatible with other variants in the AD9984A family?

No-the AD9984AKSTZ-140 (80-lead LQFP) and AD9984AKCPZ-140 (64-lead LFCSP) share identical electrical functionality and register maps but differ in physical package, pin count, and layout. They are not pin-compatible; migration requires PCB redesign. This distinction is clearly indicated in the Ordering Guide and Outline Dimensions sections of the AD9984A Rev. A datasheet.