Analog Devices Inc. AD9984KSTZ-110

Overview

AD9984KSTZ-110 from Analog Devices is a 10-bit, 110 MSPS triple analog-to-digital converter IC optimized for RGB/YPbPr video digitization in display interface systems. It integrates a PLL-based pixel clock generator, auto gain/offset matching, clamp control, and programmable output formatting (4:4:4, 4:2:2, DDR). It supports HDTV up to 1080i and graphics resolutions including SXGA (1280×1024) at 60 Hz.

For engineers reviewing the AD9984KSTZ-110 datasheet, AD9984KSTZ-110 pinout, AD9984KSTZ-110 application, or AD9984KSTZ-110 equivalent, key selection criteria include its 110 MSPS sampling rate, 300 MHz full-power analog bandwidth, tri-channel 10-bit ADC architecture, integrated sync processing (Hsync/Vsync/SOG), and LQFP-80 package with separate analog/digital/PLL power domains.

Technical Context

The AD9984KSTZ-110 implements three independent 10-bit ADC channels with shared PLL-based clock generation, supporting both RGB and YPbPr signal paths via dual-input 2:1 mux per channel. Its PLL accepts tri-level sync (YPbPr) or Hsync (RGB) inputs and maintains stable 10–110 MHz output frequencies with COAST mode during sync loss.

It features fully programmable DC restoration-including auto clamp timing, external clamp input, and 50% FS offset adjustment range-and synchronized 10-bit parallel CMOS outputs (RED[9:0], GREEN[9:0], BLUE[9:0]) with DATACK, HSOUT, and SOGOUT. All configuration is performed via a 100 kHz I²C-compatible serial interface with 32-step phase adjustment and register-mapped gain/offset/sync controls.

Key Specifications

Pinout & Package

AD9984KSTZ-110 is housed in an 80-pin Pb-free LQFP surface-mount package (12 mm × 12 mm, 0.5 mm pitch) with exposed thermal pad. Power and ground pins are distributed across all four sides to minimize supply impedance and crosstalk.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar analog video digitizer applications.

Compared with AD9984KSTZ-110, AD9983ASTZ offers lower cost and power but sacrifices 110 MSPS capability and SOG functionality, while THS8200IPHP provides higher speed and matrix processing but requires external calibration and lacks auto-clamp-making AD9984KSTZ-110 optimal for RGB/YPbPr consumer display interfaces needing self-contained calibration and sync flexibility.

Availability

AD9984KSTZ-110 is available at Aetrix Electronics and suitable for advanced TV video capture, plasma display interface, LCD monitor signal processing, and HDTV graphics digitization requiring stable component supply, long-term lifecycle support, and guaranteed Pb-free compliance.

Supply support for AD9984KSTZ-110 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and over 50 years of precision signal chain innovation.

The AD9984KSTZ-110 belongs to Analog Devices' high-speed video interface product line, engineered specifically for robust, low-jitter digitization of analog RGB and YPbPr video in consumer and professional display systems operating from 0°C to +70°C.

FAQ

What is the maximum pixel clock frequency supported by the AD9984KSTZ-110?

The AD9984KSTZ-110 supports a maximum conversion rate of 110 MSPS, corresponding to a 110 MHz pixel clock. This enables digitization of video formats up to 1080i60 and graphics resolutions such as SXGA (1280×1024) at 60 Hz. The internal PLL generates this clock from Hsync or tri-level sync inputs, and its output frequency is programmable from 10 MHz to 110 MHz with 32-step phase adjustment. The AD9984KSTZ-110 does not support 140 MSPS or 170 MSPS modes-those require AD9984KSTZ-140 or AD9984KSTZ-170 variants.

Does the AD9984KSTZ-110 support Sync-on-Green (SOG) signal extraction?

Yes, the AD9984KSTZ-110 includes dedicated SOGIN0 and SOGIN1 inputs with an internal high-speed comparator and programmable 8 mV threshold (8–256 mV above negative peak). It outputs processed sync via SOGOUT, which can be configured to deliver raw SOG, regenerated Hsync, or filtered Hsync using Register 0x1D. This eliminates the need for external sync separators in VGA or component video systems. The AD9984KSTZ-110 also supports automatic polarity detection and threshold calibration-key capabilities absent in lower-tier video ADCs.

How does the auto gain and offset matching work in the AD9984KSTZ-110?

The AD9984KSTZ-110 implements two independent calibration features: Auto Offset restores DC reference levels across all three channels simultaneously, and Auto Channel-to-Channel Gain Matching minimizes inter-channel gain variation to ≤1% FS. Both functions are enabled via serial register bits and execute during vertical blanking intervals without interrupting active video. They compensate for process, voltage, and temperature drift-ensuring consistent color fidelity without host MCU intervention. These calibrations are specific to the AD9984KSTZ-110's architecture and are not available in pin-compatible alternatives like the THS8200.

What power supply domains does the AD9984KSTZ-110 require?

The AD9984KSTZ-110 requires four independent power supplies: VD (1.8 V) for analog core, VDD (1.8–3.3 V) for digital outputs, PVD (1.8 V) for PLL circuitry, and DAVDD (1.8 V) for digital logic. Each domain has dedicated pins (e.g., 4× VD, 4× VDD, 3× PVD, 1× DAVDD) and must be decoupled locally with low-ESR capacitors. This separation suppresses noise coupling-especially critical for PLL jitter performance. The AD9984KSTZ-110 datasheet specifies strict layout guidelines for these supplies, and failure to isolate PVD will degrade sampling clock stability.

Is the AD9984KSTZ-110 pin-compatible with other members of the AD9984 family?

No, the AD9984KSTZ-110 is not pin-compatible with AD9984KSTZ-140 or AD9984KSTZ-170. While all share the same 80-pin LQFP package and pinout, their maximum sampling rates (110/140/170 MSPS) correspond to different internal PLL and ADC optimizations. The AD9984KSTZ-110's specifications-including DNL (±0.6 LSB), INL (±0.7 LSB), and dynamic performance-are validated only at ≤110 MSPS. Substituting higher-speed variants may cause timing violations or exceed thermal limits without board-level validation.