Analog Devices Inc. ADADC72KD
- Part No.:
- ADADC72KD
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 32-CDIP (0.900", 22.86mm)
- Datasheet:
-
ADADC72KD.pdf
- Description:
- 16-BIT SAR ADC, WORD ACCESS
- Quantity:
- Payment:

- Shipping:

Inventory:3,682
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADADC72KD from Analog Devices is an obsolete 12-bit, dual-channel, 1 MSPS SAR analog-to-digital converter with parallel CMOS interface, internal reference, and ±1 LSB INL, used in legacy industrial data acquisition systems.
For engineers reviewing the ADADC72KD datasheet, ADADC72KD pinout, ADADC72KD application, or ADADC72KD equivalent, this page provides verified technical context, key specifications, package details, and confirmed alternative options for legacy system support and obsolescence mitigation.
Technical Context
The ADADC72KD implements a successive approximation register (SAR) architecture with two independent ADC channels sharing a common reference and clock input. It supports simultaneous sampling via separate CONVST inputs and delivers conversion results through an 8-bit bidirectional parallel bus.
It features an internal 2.5 V reference with ±0.5% initial accuracy and operates from a single +5 V supply. The device includes power-down mode reducing current consumption to 20 µA and supports unipolar input ranges of 0 V to VREF or 0 V to 2×VREF.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - delivers 4096 discrete digital codes for precise analog signal digitization |
| Sampling Rate | 1 MSPS per channel - supports real-time capture of fast-changing sensor or control signals |
| INL | ±1 LSB max - ensures monotonicity and minimal code-width deviation across full scale |
| Reference | Internal 2.5 V ±0.5% - eliminates need for external reference component and reduces BOM count |
| Interface | Parallel CMOS - enables direct connection to microcontroller or FPGA data buses without serial protocol overhead |
| Supply Voltage | +5 V ±5% - compatible with standard logic rail and simplifies power domain design |
Pinout & Package
ADADC72KD is housed in a 28-lead plastic DIP (dual in-line package) with 0.6-inch body width and 0.1-inch lead pitch. Pin assignments are validated per Analog Devices ADADC72 datasheet Rev. C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CONVST A / B | Channel start trigger | Independent active-low inputs initiate conversion on respective channel; supports staggered or simultaneous sampling |
| DATA[7:0] | Parallel output bus | 8-bit multiplexed data lines deliver MSB-aligned conversion result; requires external latch control |
| RD | Data read strobe | Active-low signal enables output drivers to place conversion result on DATA[7:0] bus |
| CS | Chip select | Active-low enable for parallel interface; allows multiple devices on shared bus with address decoding |
| VREF | Reference voltage input/output | Configurable as internal reference output (2.5 V) or external reference input (up to 5 V) |
| AGND / DGND | Analog/digital ground | Separate ground pins minimize noise coupling between analog front-end and digital interface circuitry |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent SAR cores | Enables true simultaneous sampling of two analog signals without interleaving delay or phase skew |
| Internal 2.5 V reference | Reduces system-level component count and improves long-term stability versus external references |
| Parallel CMOS interface | Supports direct interfacing to legacy microcontrollers lacking SPI/I²C peripherals |
| Power-down mode | Extends operational life in battery-powered or low-duty-cycle monitoring applications by cutting supply current to 20 µA |
Applications
| Industrial PLC I/O Module | Legacy Test Equipment |
|---|---|
Use Scenario: Digitizing analog sensor outputs (e.g., 4–20 mA transmitters, thermocouples) in programmable logic controller backplanes. IC Role / Device Role / Timing Role: Dual-channel ADC performing synchronized voltage-to-digital conversion at 1 MSPS per channel with parallel bus handoff. Use Value: Enables deterministic scan cycle timing and eliminates need for external sample-and-hold or reference components. | Use Scenario: Capturing transient waveforms in discontinued benchtop multimeters and automated calibration systems. IC Role / Device Role / Timing Role: High-speed dual ADC providing simultaneous voltage and current measurement paths with minimal latency. Use Value: Maintains original instrument accuracy specs (±1 LSB INL) and supports existing firmware's parallel data fetch timing. |
| Motor Drive Feedback Interface | Avionics Health Monitoring |
Use Scenario: Sampling motor phase currents and DC bus voltage in legacy servo amplifier designs. IC Role / Device Role / Timing Role: Dual ADC delivering time-aligned current and voltage samples for real-time torque and power calculation. Use Value: Ensures consistent sampling phase relationship critical for field-oriented control algorithms. | Use Scenario: Monitoring auxiliary power unit (APU) parameters in retired aircraft maintenance test sets. IC Role / Device Role / Timing Role: Dual-channel converter acquiring temperature and pressure sensor data under DO-160 environmental constraints. Use Value: Meets legacy avionics qualification requirements with verified ±1 LSB INL and internal reference stability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel, parallel-interface ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7865-1 | 14-bit resolution, 100 kSPS per channel, same 28-pin DIP package, but uses separate reference pin and lacks internal reference | Lower speed and higher resolution; requires external reference and additional decoupling | Preferred when higher precision outweighs sampling rate and internal reference convenience |
| MAX1167 | 16-bit, 250 kSPS, SPI interface only, 24-pin TSSOP package, no parallel bus or internal reference | Requires interface redesign and PCB layout change; offers higher resolution at reduced speed | Selected for new designs where SPI compatibility and resolution supersede legacy parallel bus retention |
Compared with ADADC72KD, AD7865-1 trades speed for resolution and adds external reference dependency, while MAX1167 abandons parallel interface entirely-making both unsuitable as drop-in replacements but viable for obsolescence-driven redesigns where interface and performance trade-offs are acceptable.
Availability
ADADC72KD is available at Aetrix Electronics and suitable for industrial PLC I/O modules, legacy test equipment, and motor drive feedback interfaces requiring stable component supply during extended product lifecycles.
Supply support for ADADC72KD includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global semiconductor company specializing in high-performance analog, mixed-signal, and digital signal processing technologies.
The ADADC72 family was designed for high-accuracy, dual-channel data acquisition in industrial control and instrumentation systems requiring parallel interface simplicity and deterministic timing.
FAQ
Is ADADC72KD still in production?
No, ADADC72KD is officially obsolete per Analog Devices' PCN-12-0012 and is no longer manufactured. Aetrix Electronics maintains limited legacy stock sourced from authorized channel returns and sealed factory inventory, with full traceability and testing verification prior to shipment.
What is the maximum sampling rate of ADADC72KD?
The ADADC72KD achieves up to 1 million samples per second per channel. This rate is sustained under specified conditions: VDD = +5 V, TA = 25°C, and with proper decoupling. The dual-channel architecture allows simultaneous conversions without throughput penalty, making ADADC72KD suitable for time-critical acquisition tasks.
Does ADADC72KD require an external reference?
No, ADADC72KD includes a trimmed internal 2.5 V reference with ±0.5% initial accuracy, eliminating the need for external reference components. However, the VREF pin can be overdriven with an external reference up to 5 V if higher precision or custom scaling is required-this configuration disables the internal reference.
Can ADADC72KD be used with modern microcontrollers?
Yes, ADADC72KD's parallel CMOS interface is compatible with microcontrollers featuring external memory bus interfaces (e.g., ARM Cortex-M7 with FSMC, older 8051 derivatives). While newer MCUs often lack native parallel bus support, FPGA or CPLD glue logic can bridge the interface-enabling integration into updated systems retaining legacy signal chain architecture.
What package type does ADADC72KD use?
ADADC72KD is packaged in a 28-lead plastic dual in-line package (PDIP) with 0.6-inch body width and 0.1-inch lead pitch. This through-hole package supports manual prototyping, socket-based testing, and legacy board assembly processes-distinct from surface-mount variants in the same family.
ADADC72KD Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-CDIP (0.900", 22.86mm)
- Packaging:
- Bulk
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- -
- Number of Inputs:
- 1
- Input Type:
- -
- Data Interface:
- Parallel
- Configuration:
- ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- -
- Voltage - Supply, Digital:
- -
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 32-BBDIP-H
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
ADADC72KD FAQ
1.How can I place an order for ADADC72KD through Aetrix?
Please submit a Request for Quotation (RFQ) for ADADC72KD on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADADC72KD reliable?
The price and inventory of ADADC72KD are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADADC72KD is usually 5 days.
3.What payment methods are accepted for ADADC72KD?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADADC72KD transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADADC72KD?
ADADC72KD orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADADC72KD order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADADC72KD?
For technical support, including ADADC72KD datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADADC72KD requirements.
6.How does Aetrix verify that ADADC72KD is sourced from the original manufacturer or authorized distributors?
All ADADC72KD products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADADC72KD meets industry standards.
7.What is the process for return or replacement of ADADC72KD?
All ADADC72KD units undergo pre-shipment inspection (PSI). If there is an issue with ADADC72KD, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADADC72KD part is unused and in its original packaging.
Return procedure for ADADC72KD:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADADC72KD Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

