Analog Devices Inc. ADAQ4003BBCZ-RL13

Overview

ADAQ4003BBCZ-RL13 from Analog Devices is an 18-bit, 2 MSPS µModule® precision data acquisition solution integrating a SAR ADC, fully differential ADC driver, reference buffer, and matched iPassives in a single 7 mm × 7 mm CSP_BGA. It delivers ±3 ppm INL, 99 dB SINAD (G = 0.454), and no missing codes for high-fidelity industrial voltage measurement systems requiring minimal layout sensitivity and guaranteed DC accuracy.

For engineers reviewing the ADAQ4003BBCZ-RL13 datasheet, ADAQ4003BBCZ-RL13 pinout, ADAQ4003BBCZ-RL13 application, or ADAQ4003BBCZ-RL13 equivalent, this page provides verified technical context, validated pin functions, confirmed performance parameters across temperature, real-world application mappings, and two rigorously cross-checked alternative µModule DAQ solutions.

Technical Context

The ADAQ4003BBCZ-RL13 implements a system-in-package architecture combining an 18-bit successive approximation register (SAR) ADC with a low-noise, fully differential amplifier (FDA) and on-board reference buffer. Its FDA supports selectable gain configurations (0.454, 0.909, 1, 1.9) and both single-ended-to-differential and fully differential input modes.

It uses Analog Devices' iPassives® technology to embed a ±0.005% matched resistor array, enabling stable common-mode rejection (90 dB) and minimizing drift-induced errors. Operation is specified from −40°C to +125°C with 1.8 V digital, 5.5 V analog, and 1.7–5.5 V interface supply rails.

Key Specifications

Pinout & Package

ADAQ4003BBCZ-RL13 is housed in a 7 mm × 7 mm, 0.80 mm pitch, 49-ball CSP_BGA (package code BC-49-5). The ball grid includes dedicated analog inputs (IN+, IN−, R1K±, R1K1±), power domains (VDD, VS+, VS−, VIO), digital I/O (SDI, SDO, SCK, CNV), and control pins (PD_AMP, PD_REF, MODE).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar precision µModule data acquisition applications.

Compared with ADAQ4003BBCZ-RL13, ADAQ7980BBCZ-RL7 trades integration for flexibility and cost, while ADAQ4001BBCZ-RL7 retains SIP benefits at reduced speed and power - making ADAQ4003BBCZ-RL13 the optimal choice for 2 MSPS industrial DAQ where layout simplicity and guaranteed DC specs are non-negotiable.

Availability

ADAQ4003BBCZ-RL13 is available at Aetrix Electronics and suitable for automatic test equipment, machine automation, and process control systems requiring stable component supply, long-term lifecycle support, and guaranteed parametric performance across extended temperature ranges.

Supply support for ADAQ4003BBCZ-RL13 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets.

The ADAQ4003BBCZ-RL13 belongs to Analog Devices' µModule Data Acquisition family - engineered to replace multi-component signal chains with factory-optimized, tested, and characterized SIP solutions for precision measurement applications.

FAQ

What is the maximum achievable throughput rate for ADAQ4003BBCZ-RL13, and what conditions are required?

The ADAQ4003BBCZ-RL13 achieves a maximum throughput rate of 2 MSPS only when turbo mode is enabled and the SCK clock frequency is ≥75 MHz (e.g., 100 MHz with VIO ≥ 2.7 V). At lower SCK rates or in standard CS mode, throughput drops to 1.78 MSPS or less. This 2 MSPS rate has zero pipeline delay, meaning conversion results are available within 320 ns of the CNV rising edge - critical for time-critical control loops. ADAQ4003BBCZ-RL13's timing is fully documented in Table 5 and Table 3 of its Rev. B datasheet.

Does ADAQ4003BBCZ-RL13 support single-ended input signals, and how is that configured?

Yes, ADAQ4003BBCZ-RL13 supports single-ended-to-differential conversion using its integrated fully differential ADC driver. This is achieved by applying the signal to IN+ while tying IN− to a defined common-mode voltage (e.g., VCMO), with gain set via internal resistor networks (R1K±, R1K1±). The FDA's wide input common-mode range and high CMRR (90 dB) preserve signal integrity. Configuration is hardware-selectable - no firmware or register writes are needed to enable this mode. ADAQ4003BBCZ-RL13's functional block diagram (Figure 1) and Table 2 clarify input range dependencies on gain setting.

What are the power supply requirements for ADAQ4003BBCZ-RL13, and can VS− be biased below ground?

ADAQ4003BBCZ-RL13 requires three independent supplies: VDD = 1.71–1.89 V (digital core), VS+ = 3–5.5 V (analog positive), and VS− = VS+ − 10 V to 0.1 V (analog negative). VS− may be biased below ground - down to −11 V relative to GND - enabling true bipolar input operation (e.g., ±10 V range with VS+ = +5 V, VS− = −5 V). Absolute maximum ratings in Table 6 confirm −11 V to +0.3 V for VS− to GND. All supplies must be low-noise and well-decoupled; power dissipation is 51.6 mW typical at 2 MSPS.

How does the iPassives® technology in ADAQ4003BBCZ-RL13 improve system-level accuracy compared to discrete implementations?

The ±0.005% matched resistor array in ADAQ4003BBCZ-RL13 - fabricated monolithically using Analog Devices' iPassives® process - ensures near-identical TC and drift between feedback and gain-setting resistors. This eliminates tracking errors that cause gain drift (±0.5 ppm/°C typical) and offset drift (0.7 ppm/°C typical at G = 0.454) in discrete solutions. In practice, this means ADAQ4003BBCZ-RL13 maintains calibrated accuracy over temperature without periodic recalibration - a key advantage in unattended industrial sensors and medical devices where field maintenance is impractical.

Is ADAQ4003BBCZ-RL13 compatible with daisy-chained SPI configurations, and how is synchronization handled?

Yes, ADAQ4003BBCZ-RL13 supports daisy-chain mode: when SDI is low at the CNV rising edge, multiple ADAQ4003BBCZ-RL13 devices can share a single SDO line, with conversion results shifted out sequentially (18 SCK cycles per device). Synchronization is maintained via the shared CNV signal - all devices sample simultaneously on the same CNV edge, ensuring coherent multi-channel acquisition. Timing parameters (tEN, tDSDO, tDIS) in Table 4 guarantee setup/hold margins. Daisy-chain mode requires no additional control logic beyond standard SPI, making it ideal for scalable channel expansion in data loggers and modular DAQ systems.