Analog Devices Inc. ADAU1328BSTZ

Overview

ADAU1328BSTZ from Analog Devices is a 24-bit, 192 kHz stereo audio codec with two differential-input ADCs and eight single-ended-output DACs, integrated PLL clock generation, SPI control interface, and 108 dB DAC/107 dB ADC dynamic range. It operates from a single 3.3 V supply and targets high-fidelity digital audio systems requiring low EMI and flexible sample rate support (8–192 kHz).

For engineers reviewing the ADAU1328BSTZ datasheet, ADAU1328BSTZ pinout, ADAU1328BSTZ application, or ADAU1328BSTZ equivalent, key selection considerations include its 48-lead LQFP package, differential ADC input architecture, TDM/I²S serial interface support up to 16 channels, log-volume control with autoramp, and PLL-based clock synthesis eliminating external high-frequency master clocks.

Technical Context

The ADAU1328BSTZ implements Analog Devices' patented multibit sigma-delta architecture for both ADCs and DACs, with continuous-time analog front-ends optimized for low EMI. Its on-chip PLL derives internal clocks from LRCLK or MCLKI (6.9–13.8 MHz in PLL mode), supporting 256×/384×/512×/768× f_S multiplication and enabling suppressed-bit-clock operation.

Digital filtering includes decimation filters (79 dB stop-band attenuation, ±0.015 dB passband ripple) for ADCs and interpolation filters (70 dB stop-band attenuation, group delay as low as 42 µs at 192 kHz) for DACs. The SPI port supports 24-bit register access for full configuration of volume, mute, power-down, and clock modes without requiring external microcontroller firmware updates.

Key Specifications

Pinout & Package

ADAU1328BSTZ is housed in a 48-lead LQFP package (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Pin functions are validated per Analog Devices Rev. B datasheet Figure 2 and Table 9.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar audio codec applications.

Compared with AK4642EN, ADAU1328BSTZ delivers 192 kHz support and integrated PLL for reduced BOM and EMI; compared with CS42888-CQZ, it offers identical sample rate capability in a smaller 48-lead LQFP package at lower pin-count complexity, trading 4 extra ADC channels for simpler layout and lower cost.

Availability

ADAU1328BSTZ is available at Aetrix Electronics and suitable for home theater systems, set-top boxes, and digital audio effects processors requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.

Supply support for ADAU1328BSTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The ADAU1328BSTZ belongs to Analog Devices' SigmaDSP®-compatible audio codec family, designed specifically for low-EMI, high-resolution consumer and professional audio systems where integration, power efficiency, and flexible clocking are critical.

FAQ

What is the maximum supported sample rate for ADAU1328BSTZ?

The ADAU1328BSTZ supports sample rates from 8 kHz up to 192 kHz, with full dynamic range and THD+N specifications guaranteed across all rates. At 192 kHz, the DAC interpolation filter uses 2× oversampling and achieves 70 dB stop-band attenuation, while the ADC decimation filter maintains 79 dB stop-band rejection. This makes ADAU1328BSTZ suitable for high-resolution audio playback and recording applications requiring extended bandwidth fidelity.

Does ADAU1328BSTZ require an external crystal or oscillator?

No - ADAU1328BSTZ includes an on-chip PLL that can generate internal clocks from either the LRCLK input or an external crystal/mclk signal applied to MCLKI/XI. When using the crystal oscillator mode, a parallel-resonant crystal (e.g., 12.288 MHz) connects between MCLKI/XI and MCLKO/XO pins. Alternatively, a buffered clock source may drive MCLKI directly. The PLL eliminates the need for external high-frequency oscillators in most designs, reducing EMI and BOM count.

How many DAC outputs does ADAU1328BSTZ provide, and what is their configuration?

ADAU1328BSTZ provides eight single-ended analog outputs arranged as four stereo pairs: OL1/OR1, OL2/OR2, OL3/OR3, and OL4/OR4. Each output delivers ±1.27 V swing at 0 dBFS with 100 Ω output impedance and a nominal 1.5 V common-mode voltage referenced to the CM pin. This configuration enables direct connection to line-level amplifiers or passive RC low-pass filters without additional level-shifting circuitry.

Can ADAU1328BSTZ operate in standalone mode without SPI control?

Yes - ADAU1328BSTZ supports standalone mode configured at power-up by grounding CIN/ADR0, CCLK/SCL, and CLATCH/ADR1 pins. In this mode, all registers default to factory settings: I²S format, 256×f_S MCLK, stereo operation, and enabled internal MCLK. Standalone mode is useful for rapid prototyping or fixed-function applications where SPI host control is unavailable, though it sacrifices programmable features like volume ramping and TDM configuration.

What is the purpose of the FILTR and CM pins on ADAU1328BSTZ?

FILTR is the internal voltage reference filter node and must be bypassed with a 10 µF electrolytic capacitor in parallel with a 100 nF ceramic capacitor to AGND; this stabilizes the 1.5 V internal reference used by both ADCs and DACs. CM is the common-mode reference output, providing a buffered 1.5 V DC level to bias external op-amps used for ADC input buffering or DAC output filtering - ensuring matched common-mode levels across the signal chain and minimizing offset-induced distortion.