Analog Devices Inc. ADAU1361BCPZ-RL
- Part No.:
- ADAU1361BCPZ-RL
- Manufacturer:
- Analog Devices Inc.
- Category:
- CODECS
- Package:
- 32-VFQFN Exposed Pad, CSP
- Datasheet:
-
ADAU1361BCPZ-RL.pdf
- Description:
- IC CODEC 24B PLL 32LFCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADAU1361BCPZ-RL from Analog Devices is a stereo, low-power, 24-bit audio codec supporting 8–96 kHz sampling rates, integrated PLL, and dual-path analog I/O with >98 dB SNR. It integrates stereo ADCs and DACs, six configurable analog inputs (single-ended/differential), stereo digital microphone input, five analog output drivers (including capless headphone support), and operates from 1.8 V to 3.3 V supplies. It is deployed in battery-powered portable audio systems requiring high-fidelity recording and playback with minimal power draw.
For engineers reviewing the ADAU1361BCPZ-RL datasheet, ADAU1361BCPZ-RL pinout, ADAU1361BCPZ-RL application, or ADAU1361BCPZ-RL equivalent, key selection considerations include its 32-lead 5 mm × 5 mm LFCSP package, I²C/SPI control interface, flexible analog mixer architecture, ALC capability, and support for both AC-coupled and capless headphone outputs - all critical for space-constrained, low-noise mobile audio designs.
Technical Context
The ADAU1361BCPZ-RL implements a fully integrated stereo audio signal chain with independent record and playback paths. Its analog front end includes a pseudo-differential/fully differential PGA with −12 dB to +35.25 dB gain range, microphone bias generator (0.65× or 0.90× AVDD), and ALC with noise gate. The digital core supports I²S, left/right-justified, and TDM serial audio formats, programmable PLL clock generation (8–27 MHz input), and digital volume control with 0.375 dB step resolution.
Playback path features dual 24-bit DACs feeding configurable line outputs (differential or single-ended) and dedicated headphone drivers capable of 32 Ω or capless 32 Ω operation. Power management includes four modes (normal, power saving, extreme power saving, enhanced performance), enabling AVDD current as low as 5.73 mA at 1.8 V during record with bypassed ADC, while maintaining >92 dB dynamic range in line output mode.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ADC/DAC Resolution | 24-bit - Enables high-fidelity audio capture and reproduction with >98 dB SNR and <−90 dB THD+N. |
| Sampling Rate Range | 8 kHz to 96 kHz - Supports voice, telephony, music, and high-resolution audio applications without external resampling. |
| Power Consumption | 7 mW record / 7 mW playback at 48 kHz, 1.8 V - Enables extended battery life in portable devices. |
| Analog Supply Range | 1.8 V to 3.65 V - Allows direct integration with common low-voltage system rails and simplifies power sequencing. |
| Digital Interface | I²C and SPI - Provides flexible host processor compatibility and robust register configuration in noisy environments. |
| PLL Input Clock Range | 8 MHz to 27 MHz - Accepts standard crystal or oscillator sources and generates precise audio clocks for integer/fractional sample rates. |
| Package | 32-lead, 5 mm × 5 mm LFCSP - Compact footprint suitable for smartphones, wearables, and compact media players. |
Pinout & Package
ADAU1361BCPZ-RL uses a 32-lead, 5 mm × 5 mm lead-frame chip-scale package (LFCSP) with exposed thermal pad. Pin functions are validated per Analog Devices Rev. E datasheet Figure 7 and Table 10.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 24, 25 | IOVDD / DVDDOUT / DGND | Digital I/O supply, internal regulator decoupling point, and digital ground - require local 100 nF + 10 μF decoupling for noise immunity. |
| 2, 3, 4, 26–32 | MCLK / ADDR0/CLATCH / JACKDET/MICIN / ADC_SDATA / DAC_SDATA / BCLK / LRCLK / ADDR1/CDATA / SDA/COUT / SCL/CCLK | Master clock input, SPI/I²C control interface, serial audio data I/O, and digital microphone interface - support multiple protocols and timing modes (I²S/TDM). |
| 5, 7, 8, 9, 22, 23 | MICBIAS / CM / AVDD / AGND | Microphone bias reference, common-mode voltage reference, analog supply, and analog ground - define analog signal centering and noise isolation between ADC/DAC paths. |
| 6, 10–14 | LAUX / LINP / LINN / RINP / RINN / RAUX | Six analog input terminals - configurable as single-ended or differential pairs with programmable PGA gain and mixing prior to ADC. |
| 15–21 | ROUTP/ROUTN / LOUTN/LOUTP / RHP / LHP / MONOOUT | Dual differential line outputs, dual single-ended headphone outputs, and mono/capless virtual ground - enable flexible routing to earpiece, speaker, or stereo headphones without external coupling capacitors. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated PLL with 8–27 MHz input | Eliminates need for multiple crystals; supports all standard audio sample rates (e.g., 44.1 kHz, 48 kHz, 96 kHz) from a single clock source. |
| Configurable analog input mixers | Enables software-selectable routing of up to six analog inputs to ADCs or bypass paths - critical for multi-mic beamforming or auxiliary source switching. |
| Capless headphone output | Drives 32 Ω loads directly without DC-blocking capacitors, reducing BOM count and PCB area in space-constrained designs. |
| Analog automatic level control (ALC) | Provides real-time gain adjustment and noise gating for consistent recording levels under varying acoustic conditions - essential for voice capture in phones and accessories. |
| Software-controllable clickless mute | Prevents audible pop artifacts during power transitions or volume changes - improves user experience in consumer audio products. |
Applications
| Smartphone Audio Subsystem | Digital Camera Audio Recording |
|---|---|
Use Scenario: Dual-microphone voice capture with noise suppression and stereo playback through earpiece and loudspeaker. IC Role / Device Role / Timing Role: Audio codec providing synchronized ADC/DAC conversion, ALC, and PLL-synchronized serial audio interface to application processor. Use Value: Delivers >94 dB SNR recording and <−90 dB THD+N playback at 7 mW, enabling full-duplex HD voice calls with extended battery runtime. |
Use Scenario: High-fidelity stereo audio recording synchronized to video capture at 48 kHz or 96 kHz. IC Role / Device Role / Timing Role: Low-latency stereo ADC with programmable PGA and digital microphone support, feeding I²S stream to image processor. Use Value: Maintains 96 dB dynamic range at 3.3 V and supports TDM for multi-channel expansion - ideal for prosumer camcorders. |
| Wireless Headphone Dongle | VoIP Phone Handset |
Use Scenario: USB-to-analog audio adapter converting digital PCM to analog headphone output with zero-latency monitoring. IC Role / Device Role / Timing Role: DAC-centric operation with capless headphone driver, low-jitter PLL, and I²C-configurable volume/mute. Use Value: Achieves <−82 dB THD+N into 32 Ω at 1.8 V and eliminates coupling capacitors - reduces size and cost vs. discrete solutions. |
Use Scenario: Full-duplex telephony with echo cancellation, sidetone mixing, and headset/mic interface. IC Role / Device Role / Timing Role: Simultaneous stereo ADC (mic input) and DAC (speaker/headset output) with independent ALC and mixer control. Use Value: Supports analog mic bias, stereo line outputs, and software-defined sidetone level - enables compact, feature-rich VoIP handsets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AK4642EN | 24-bit, 96 kHz codec with 3.3 V-only analog supply; no integrated PLL; lower SNR (94 dB typical); 28-pin QFN. | Lacks capless headphone output and digital microphone interface; requires external clock generation. | Choose when system already provides stable master clock and capless output is not required. |
| WM8960GEFL/V | 24-bit, 96 kHz codec with integrated PLL; 32-pin QFN; higher power (12 mW playback); no stereo digital mic input. | Includes Class D speaker driver but lacks dedicated capless headphone mode and ALC flexibility. | Prefer when driving external speakers is prioritized over ultra-low-power headphone operation. |
Compared with AK4642EN and WM8960GEFL/V, ADAU1361BCPZ-RL uniquely combines capless headphone drive, stereo digital microphone input, and ultra-low 7 mW power at 1.8 V - making it optimal for compact, battery-sensitive portable audio where analog integration and power efficiency are primary constraints.
Availability
ADAU1361BCPZ-RL is available at Aetrix Electronics and suitable for smartphone audio subsystems, digital camera recording modules, wireless headphone dongles, and VoIP handset designs requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for ADAU1361BCPZ-RL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and DSP technologies, serving industrial, automotive, communications, and consumer markets with precision signal processing solutions.
The ADAU1361BCPZ-RL belongs to Analog Devices' SigmaDSP®-enabled audio codec family, designed specifically for low-power, high-SNR portable audio applications requiring integrated analog front-end flexibility, digital microphone support, and minimal external components.
FAQ
What is the maximum supported sampling rate for ADAU1361BCPZ-RL?
The ADAU1361BCPZ-RL supports sampling rates from 8 kHz up to 96 kHz across both ADC and DAC paths. This range accommodates voice telephony (8–16 kHz), CD-quality audio (44.1 kHz), and high-resolution playback (96 kHz). The integrated PLL ensures accurate clock synthesis for all standard integer rates without external frequency dividers. ADAU1361BCPZ-RL maintains >96 dB dynamic range and <−90 dB THD+N at 96 kHz in line output mode per Rev. E datasheet specifications.
Does ADAU1361BCPZ-RL support digital microphones?
Yes, ADAU1361BCPZ-RL includes a dedicated stereo digital microphone input (MICIN on Pin 4) compatible with PDM microphones. It accepts 1-bit PDM data streams synchronized to BCLK and converts them internally to 24-bit PCM. The digital microphone interface supports configurable clock polarity and timing parameters per Figure 6 in the Rev. E datasheet. ADAU1361BCPZ-RL does not require external decimation filters or additional logic for PDM-to-PCM conversion.
Can ADAU1361BCPZ-RL operate with a 1.8 V analog supply?
Yes, ADAU1361BCPZ-RL operates with AVDD from 1.8 V to 3.65 V. At 1.8 V, it achieves 7 mW record and 7 mW playback power at 48 kHz, with >94 dB SNR (A-weighted) and <−88 dB THD+N in ADC performance. All analog I/O - including microphone bias (1.17 V at AVDD = 1.8 V), line outputs (0.50 V rms full-scale), and headphone drivers - scale linearly with AVDD. ADAU1361BCPZ-RL maintains full functionality and specified performance across this voltage range.
What package type does ADAU1361BCPZ-RL use?
ADAU1361BCPZ-RL uses a 32-lead, 5 mm × 5 mm lead-frame chip-scale package (LFCSP) with exposed thermal pad (EP). This RoHS-compliant package provides low thermal resistance (θJA = 50.1°C/W) and supports fine-pitch PCB assembly. Pin layout follows standardized audio codec conventions, with segregated analog/digital grounds and dedicated decoupling pins (e.g., IOVDD, AVDD, DVDDOUT). ADAU1361BCPZ-RL requires soldering the exposed pad to the PCB ground plane for optimal thermal and electrical performance.
How does the ALC function work in ADAU1361BCPZ-RL?
The ADAU1361BCPZ-RL implements analog automatic level control (ALC) with adjustable attack/release times, threshold, and gain ceiling. It monitors ADC input level in real time and applies PGA gain correction to maintain consistent output amplitude - critical for voice capture in variable acoustic environments. ALC includes a noise gate to suppress background noise below threshold. All parameters are software-configurable via I²C/SPI registers. ADAU1361BCPZ-RL supports ALC independently on left and right channels with no added latency in the signal path.
ADAU1361BCPZ-RL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Type:
- Audio
- Data Interface:
- Serial
- Resolution (Bits):
- 24 b
- Number of ADCs / DACs:
- 2 / 2
- Sigma Delta:
- No
- S/N Ratio, ADCs / DACs (db) Typ:
- -
- Dynamic Range, ADCs / DACs (db) Typ:
- -
- Voltage - Supply, Analog:
- 1.8V ~ 3.6V
- Voltage - Supply, Digital:
- 1.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-LFCSP-VQ (5x5)
ADAU1361BCPZ-RL FAQ
1.How can I place an order for ADAU1361BCPZ-RL through Aetrix?
Please submit a Request for Quotation (RFQ) for ADAU1361BCPZ-RL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADAU1361BCPZ-RL reliable?
The price and inventory of ADAU1361BCPZ-RL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADAU1361BCPZ-RL is usually 5 days.
3.What payment methods are accepted for ADAU1361BCPZ-RL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADAU1361BCPZ-RL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADAU1361BCPZ-RL?
ADAU1361BCPZ-RL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADAU1361BCPZ-RL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADAU1361BCPZ-RL?
For technical support, including ADAU1361BCPZ-RL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADAU1361BCPZ-RL requirements.
6.How does Aetrix verify that ADAU1361BCPZ-RL is sourced from the original manufacturer or authorized distributors?
All ADAU1361BCPZ-RL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADAU1361BCPZ-RL meets industry standards.
7.What is the process for return or replacement of ADAU1361BCPZ-RL?
All ADAU1361BCPZ-RL units undergo pre-shipment inspection (PSI). If there is an issue with ADAU1361BCPZ-RL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADAU1361BCPZ-RL part is unused and in its original packaging.
Return procedure for ADAU1361BCPZ-RL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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