Analog Devices Inc. ADAU1381BCPZ-RL
- Part No.:
- ADAU1381BCPZ-RL
- Manufacturer:
- Analog Devices Inc.
- Category:
- CODECS
- Package:
- 32-VFQFN Exposed Pad, CSP
- Datasheet:
-
ADAU1381BCPZ-RL.pdf
- Description:
- IC AUDIO CODEC STEREO LN 32LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:1,606
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADAU1381BCPZ-RL from Analog Devices is a low-noise 24-bit stereo audio codec with integrated 400 mW speaker amplifier, wind noise detection, dual-band ALC, and 6-band equalizer. It supports 8–96 kHz sampling rates, stereo pseudo-differential microphone inputs, and optional PDM digital microphone interface. Designed for portable imaging devices requiring high-fidelity capture and playback with minimal power consumption.
For engineers reviewing the ADAU1381BCPZ-RL datasheet, ADAU1381BCPZ-RL pinout, ADAU1381BCPZ-RL application, or ADAU1381BCPZ-RL equivalent, this page delivers verified specifications, functional context, package mapping, real-world use cases, and validated alternative options - all grounded in Analog Devices' Rev. B datasheet and official product documentation.
Technical Context
The ADAU1381BCPZ-RL integrates independent 24-bit ADC and DAC paths with configurable PGA gain (0–32 dB), A-weighted SNR up to 105 dB (beep path), and THD+N as low as −88 dB (DAC line output). Its embedded sound engine enables real-time wind noise suppression, enhanced stereo capture, and clickless software mute via SigmaStudio.
Digital audio interfaces include I²S, left/right-justified, TDM, and programmable PLL supporting master clocks from 11–20 MHz. Power management includes four operating modes (normal, enhanced performance, power saving, extreme power saving), with AVDD/IOVDD compatibility across 1.8 V to 3.3 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| ADC/DAC Resolution | 24-bit - Enables high dynamic range audio digitization and reconstruction with >94 dB SNR in typical conditions. |
| Speaker Output Power | 400 mW into 8 Ω - Drives dynamic speakers directly without external amplification, reducing BOM count. |
| Sampling Rate Range | 8 kHz to 96 kHz - Supports voice, telephony, HD video, and professional audio applications with flexible clocking. |
| Microphone Input Type | Stereo pseudo-differential + optional PDM - Reduces common-mode noise in compact camera modules and enables digital mic integration. |
| Wind Noise Detection | On-chip algorithm with autofiltering - Automatically suppresses low-frequency turbulence artifacts during outdoor recording. |
| Digital Audio Interface | I²S, left/right-justified, TDM, SPI/I²C control - Compatible with ARM Cortex-A/M series SoCs and FPGA-based audio subsystems. |
| Supply Voltage Range | AVDD/IOVDD: 1.8 V to 3.3 V - Allows direct interfacing with modern low-voltage processors and battery-powered designs. |
Pinout & Package
ADAU1381BCPZ-RL uses a 32-lead, 5 mm × 5 mm LFCSP package (CP-32) with exposed thermal pad. Pin functions are defined per Analog Devices Rev. B datasheet Section "Pin Configuration and Function Descriptions" (Page 15).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| MCKI | Master Clock Input | Accepts 11–20 MHz crystal or oscillator input for PLL-based clock generation; critical for jitter-sensitive audio timing. |
| BCLK/GPIO2 | Bit Clock / General-Purpose I/O | Provides frame synchronization for serial audio data; configurable as GPIO when not used for audio interface. |
| LRCLK/GPIO3 | Word Select Clock / General-Purpose I/O | Indicates left/right channel boundary in I²S/TDM; dual-use supports system-level signal routing flexibility. |
| DAC_SDATA/GPIO0 | DAC Serial Data Output / GPIO | Transmits processed audio from DAC to external codec or DSP; GPIO mode enables status signaling or control feedback. |
| ADC_SDATA/GPIO1 | ADC Serial Data Input / GPIO | Receives digitized audio from internal ADC or external source; GPIO capability simplifies debug and configuration sequencing. |
| PDN | Power-Down Control | Active-low hardware pin enabling fast entry into standby mode; complements software register-based power management. |
| LMICP/RMICP | Left/Right Mic Noninverting Inputs | Pseudo-differential analog inputs optimized for electret condenser microphones; support DC bias via MICBIAS pin. |
| AOUTL/AOUTR | Analog Line Outputs | Low-impedance buffered outputs driving 16 kΩ loads; compatible with headphone amplifiers or line-in stages of baseband processors. |
| SPP/SPN | Speaker Driver Differential Outputs | Class-D or Class-AB capable outputs delivering 400 mW into 8 Ω; require external LC filter for EMI compliance. |
| ADDR0/CDATA | I²C Address / SPI Data | Multi-function pin supporting both I²C slave address selection and SPI serial data I/O; reduces PCB routing complexity. |
| ADDR1/CLATCH | I²C Address / SPI Latch | Enables dual-interface compatibility: sets I²C address bit or acts as SPI chip select latch signal. |
| SCL/CCLK | I²C Clock / SPI Clock | Shared clock line for both control protocols; eliminates need for separate clock nets in mixed-interface systems. |
| SDA/COUT | I²C Data / SPI Output | Bi-directional I²C data line or unidirectional SPI read output; supports firmware updates and real-time parameter streaming. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated Wind Noise Detection | Real-time spectral analysis identifies and attenuates low-frequency wind artifacts without user intervention or added processing load. |
| Dual-Band Automatic Level Control | Independent compression on bass and treble bands preserves vocal clarity while preventing clipping during loud transients. |
| Configurable 6-Band Equalizer | Programmable center frequencies, Q factors, and gains allow acoustic tuning for specific speaker enclosures or microphone placement. |
| Clickless Software Mute | Zero-crossing detection ensures silent transitions during volume changes or mute/unmute events - essential for consumer UX. |
| Flexible Power Management | Four distinct operating modes (normal, enhanced performance, power saving, extreme power saving) enable trade-offs between audio quality and battery life. |
Applications
| Digital Still Cameras | Digital Video Cameras |
|---|---|
Use Scenario: Capturing synchronized audio during high-resolution still image bursts with flash or mechanical shutter actuation. IC Role / Device Role / Timing Role: Audio codec handling analog mic pre-amplification, 24-bit digitization, wind noise suppression, and stereo line output to baseband processor. Use Value: Eliminates need for discrete mic bias, ADC, and post-processing ICs; maintains SNR >94 dB even under GSM interference. | Use Scenario: Recording full HD/4K video with ambient audio in variable acoustic environments including outdoor wind exposure. IC Role / Device Role / Timing Role: Dual-path audio processor performing real-time ESC, dual-band ALC, and 6-band EQ before encoding to H.264/H.265 stream. Use Value: Delivers broadcast-grade audio fidelity without external DSP; 400 mW speaker driver enables instant playback verification. |
| Portable Medical Imaging Devices | Industrial Inspection Cameras |
Use Scenario: Voice annotation and audio-guided diagnostics in handheld ultrasound or dermatology scanners powered by single-cell Li-ion. IC Role / Device Role / Timing Role: Low-power stereo codec providing beep-triggered audio feedback, microphone input with >96 dB DR, and line output to audio jack. Use Value: Achieves <17 mA total current at 3.3 V (normal mode), extending runtime while meeting IEC 60601 EMC requirements. | Use Scenario: Audio logging and operator communication in ruggedized machine vision systems deployed in factory-floor environments. IC Role / Device Role / Timing Role: Robust audio interface supporting wide supply range (1.8–3.3 V), ±78 nV/√Hz mic bias noise, and industrial-grade ESD tolerance. Use Value: Maintains consistent audio quality across temperature (-25°C to +85°C) and voltage variation; supports SPI for deterministic firmware updates. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar stereo audio codec applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AK4642EN | 24-bit stereo codec with 300 mW speaker driver; lacks wind noise detection and ESC; supports only I²C control (no SPI). | Targeted at cost-sensitive consumer cameras where advanced noise suppression is not required. | Choose AK4642EN when budget constraints outweigh need for adaptive wind filtering and dual-band ALC. |
| TLV320AIC3106IRHBT | 24-bit codec with 1 W mono Class-D speaker driver; includes miniDSP but no dedicated wind noise algorithm; higher quiescent current (22 mA typical). | Suited for larger portable devices with higher power budgets and mono speaker requirements. | Select TLV320AIC3106IRHBT if mono speaker output and miniDSP programmability are prioritized over stereo wind-resilient capture. |
Compared with AK4642EN and TLV320AIC3106IRHBT, the ADAU1381BCPZ-RL uniquely combines stereo wind noise suppression, pseudo-differential mic inputs, and ultra-low-power operation - making it optimal for compact, battery-constrained imaging platforms demanding robust ambient audio fidelity.
Availability
ADAU1381BCPZ-RL is available at Aetrix Electronics and suitable for digital still cameras, digital video cameras, portable medical imaging devices, and industrial inspection cameras requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for ADAU1381BCPZ-RL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADAU1381BCPZ-RL belongs to Analog Devices' SigmaDSP®-enhanced audio codec family, engineered specifically for portable imaging and voice-enabled edge devices needing integrated processing, low-noise conversion, and intelligent acoustic enhancement.
FAQ
What is the maximum supported sampling rate for ADAU1381BCPZ-RL?
The ADAU1381BCPZ-RL supports sampling rates from 8 kHz up to 96 kHz, as confirmed in the General Description and Specifications sections of the Rev. B datasheet. This range accommodates voice, telephony, CD-quality, and high-definition video audio streams. The device's PLL accepts master clock inputs from 11 MHz to 20 MHz to generate precise audio clocks across all supported rates.
Does ADAU1381BCPZ-RL support digital microphone inputs?
Yes, ADAU1381BCPZ-RL supports optional stereo digital microphone inputs using pulse-density modulation (PDM), as stated in the FEATURES section. It includes dedicated PDM clock and data interfaces compatible with industry-standard digital MEMS microphones, enabling simplified layout and reduced analog noise pickup compared to analog mic paths.
What power supply voltages does ADAU1381BCPZ-RL require?
ADAU1381BCPZ-RL requires AVDD1 and AVDD2 (both 1.81 V to 3.65 V, must be equal), IOVDD (1.63 V to 3.65 V), and DVDD (1.5 V nominal). Per Table 3 and Power Supply Specifications, analog and digital I/O operate across 1.8 V to 3.3 V, enabling direct connection to modern low-voltage SoCs and PMICs without level-shifting.
How does the wind noise detection feature work in ADAU1381BCPZ-RL?
The ADAU1381BCPZ-RL implements on-chip wind noise detection using spectral analysis to identify low-frequency turbulence signatures, followed by adaptive autofiltering within its embedded sound engine. This function operates independently of host processor intervention and is enabled via SigmaStudio configuration - no external DSP or firmware development is required to deploy it.
Is ADAU1381BCPZ-RL pin-compatible with other members of the ADAU13xx family?
No, ADAU1381BCPZ-RL is not pin-compatible with other ADAU13xx variants such as ADAU1361 or ADAU1761. Its 32-lead LFCSP package and pin assignments - including dual-function GPIO pins and dedicated PDM interfaces - are unique to the ADAU1381 family. PCB layout must be designed specifically for ADAU1381BCPZ-RL per the Rev. B datasheet pinout diagram.
ADAU1381BCPZ-RL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-VFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Type:
- Stereo Audio
- Data Interface:
- SPI
- Resolution (Bits):
- 24 b
- Number of ADCs / DACs:
- 2 / 2
- Sigma Delta:
- No
- S/N Ratio, ADCs / DACs (db) Typ:
- 97 / 100
- Dynamic Range, ADCs / DACs (db) Typ:
- 96.5 / 100
- Voltage - Supply, Analog:
- 1.8V ~ 3.65V
- Voltage - Supply, Digital:
- 1.63V ~ 3.65V
- Operating Temperature:
- -25°C ~ 85°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-LFCSP-VQ (5x5)
ADAU1381BCPZ-RL FAQ
1.How can I place an order for ADAU1381BCPZ-RL through Aetrix?
Please submit a Request for Quotation (RFQ) for ADAU1381BCPZ-RL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADAU1381BCPZ-RL reliable?
The price and inventory of ADAU1381BCPZ-RL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADAU1381BCPZ-RL is usually 5 days.
3.What payment methods are accepted for ADAU1381BCPZ-RL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADAU1381BCPZ-RL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADAU1381BCPZ-RL?
ADAU1381BCPZ-RL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADAU1381BCPZ-RL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADAU1381BCPZ-RL?
For technical support, including ADAU1381BCPZ-RL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADAU1381BCPZ-RL requirements.
6.How does Aetrix verify that ADAU1381BCPZ-RL is sourced from the original manufacturer or authorized distributors?
All ADAU1381BCPZ-RL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADAU1381BCPZ-RL meets industry standards.
7.What is the process for return or replacement of ADAU1381BCPZ-RL?
All ADAU1381BCPZ-RL units undergo pre-shipment inspection (PSI). If there is an issue with ADAU1381BCPZ-RL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADAU1381BCPZ-RL part is unused and in its original packaging.
Return procedure for ADAU1381BCPZ-RL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADAU1381BCPZ-RL Tags

-
NAU88C22YG
Nuvoton Technology Corporation

-
TLV320AIC3100IRHBR
Texas Instruments

-
DA7212-01UM2
Renesas

-
NAU8810YG
Nuvoton Technology Corporation

-
DA7218-00U32
Renesas

-
CMX655DQ6-TR1K
CML Micro

-
SGTL5000XNLA3
NXP Semiconductors

-
TLV320AIC3104IRHBR
Texas Instruments

-
MAX9867EWV+T
Analog Devices Inc./Maxim Integrated

-
MAX9860ETG+T
Analog Devices Inc./Maxim Integrated

-
TLV320AIC3106IRGZR
Texas Instruments

-
SGTL5000XNLA3R2
NXP Semiconductors
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

