Analog Devices Inc. ADAU1702JSTZ
- Part No.:
- ADAU1702JSTZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- DSP (Digital Signal Processors)
- Package:
- 48-LQFP
- Datasheet:
-
ADAU1702JSTZ.pdf
- Description:
- IC AUDIO PROC 2ADC/4DAC 48-LQFP
- Quantity:
- Payment:

- Shipping:

Inventory:3,375
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADAU1702JSTZ from Analog Devices is a fully programmable 28-/56-bit SigmaDSP audio processor with two 24-bit Σ-Δ ADCs (SNR = 100 dB, THD+N = −83 dB), four 24-bit Σ-Δ DACs (SNR = 104 dB, THD+N = −90 dB), integrated PLL and crystal oscillator, and self-boot capability from serial EEPROM. It operates at up to 25 MIPS and supports sampling rates up to 192 kHz for high-fidelity audio signal processing in embedded systems.
For engineers reviewing the ADAU1702JSTZ datasheet, ADAU1702JSTZ pinout, ADAU1702JSTZ application, or ADAU1702JSTZ equivalent, this device serves as a complete standalone audio system-enabling equalization, crossover, bass enhancement, multiband dynamics, delay compensation, and speaker correction without external microcontrollers or firmware development.
Technical Context
The ADAU1702JSTZ integrates a 28-/56-bit audio DSP core with full double-precision (56-bit accumulator) arithmetic, enabling high-resolution real-time audio processing. Its dual ADCs and quad DACs share a common 1.5 V reference (CM), support A-weighted dynamic range of 95–100 dB (ADC) and 99–104 dB (DAC), and exhibit matched group delay (480 µs ADC / 400 µs DAC).
It features flexible digital I/O supporting I2S, left/right-justified, and TDM modes across eight input and eight output channels, plus dual control interfaces (I²C and 4-wire SPI). The on-chip 1.8 V regulator (DVDD) is driven via VDRIVE and an external PNP transistor, while PLL accepts master clock inputs at 64×fS, 256×fS, 384×fS, or 512×fS for jitter-tolerant clock synthesis.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| DSP Core | 28-/56-bit, 25 MIPS - enables full double-precision biquad filtering and multiband dynamics with <100 µs latency per stage |
| ADC Performance | 2 × 24-bit Σ-Δ, SNR = 100 dB A-weighted - supports high-fidelity analog input capture with 95 dB dynamic range at −60 dBFS |
| DAC Performance | 4 × 24-bit Σ-Δ, SNR = 104 dB A-weighted - delivers low-noise analog output with <−90 dB THD+N at −1 dBFS |
| Sampling Rate | Up to 192 kHz - allows ultrasonic content handling and oversampled filter design for steep anti-aliasing |
| PLL Input Modes | 64×fS, 256×fS, 384×fS, 512×fS - provides flexible clock tree integration with standard audio clocks (e.g., 12.288 MHz for 48 kHz) |
| Supply Voltages | AVDD/PVDD/IOVDD = 3.3 V; DVDD = 1.8 V (regulator-generated) - ensures compatibility with mixed-signal 3.3 V systems and low-power digital core operation |
| Self-Boot | Serial EEPROM interface - enables autonomous startup without host MCU; parameter state can be written back on power-down |
Pinout & Package
ADAU1702JSTZ is housed in a 48-lead plastic LQFP (7 mm × 7 mm, 0.5 mm pitch) with exposed thermal pad. Power domains are segregated: AGND/DGND/PGND tied to common ground plane; AVDD, DVDD, PVDD, and IOVDD decoupled individually with 100 nF capacitors.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 2 (ADC0) | Analog current input | 2 V rms full-scale with 18 kΩ external resistor; enables voltage scaling and noise-immune current-mode input |
| Pin 3 (ADC_RES) | ADC reference current sink | Defines full-scale ADC current (100 µA rms); sets gain accuracy and linearity via precision external resistor |
| Pin 14–16, 19, 26–27 (MP6–MP11, MP1–MP5) | Multipurpose GPIO / serial I/O | Configurable as SDATA_OUT0–3, OUTPUT_LRCLK/BCLK, INPUT_LRCLK/BCLK/SDATA_IN0–1, or auxiliary ADC inputs - enables flexible interface mapping without redesign |
| Pin 20 (ADDR1/CDATA/WB) | I²C address / SPI data / EEPROM write-back trigger | Supports up to four devices on one I²C bus; enables parameter persistence by triggering register save to EEPROM on power-down |
| Pin 21 (CLATCH/WP) | SPI latch / EEPROM write protect | Controls SPI transaction timing; asserts open-collector WP during self-boot to enable safe EEPROM writes |
Key Features
| Feature | Design Value |
|---|---|
| Graphical programming via SigmaStudio™ | Enables drag-and-drop signal flow configuration (biquads, dynamics, level controls, GPIO logic) without C coding or compiler toolchain |
| On-chip 1.8 V regulator (DVDD) | Eliminates need for external LDO; driven by VDRIVE pin with external Zetex FZT953 PNP transistor for stable core supply |
| Auxiliary 8-bit ADC with 4-input mux | Provides analog sensor monitoring (e.g., temperature, volume pot) with 0.5 LSB INL and 17.8–42 kΩ input impedance |
| Flexible serial port modes | Supports I²S, left/right-justified, and TDM up to 8 channels in/out - allows glueless expansion with additional codecs or ADC/DACs |
| GPIO matrix with input latency ≤1.5/fS | Enables real-time digital control (e.g., mute, preset selection) with deterministic response synchronized to audio sample rate |
Applications
| Multimedia Speaker Systems | Automotive Head Units |
|---|---|
Use Scenario: Compact active speaker with built-in crossover, EQ, and room correction. IC Role / Device Role / Timing Role: Audio DSP performs real-time 4-way crossover, parametric EQ, and speaker time-alignment using internal 10 ms delay memory. Use Value: Compensates for driver nonlinearity and enclosure diffraction, achieving flat acoustic response without external DSP hardware. | Use Scenario: In-dash infotainment unit with multi-zone audio routing and engine noise cancellation. IC Role / Device Role / Timing Role: Processes analog inputs from mic array and radio tuner, applies adaptive filtering, and drives 4-channel amplifier via DAC outputs. Use Value: Enables simultaneous 192 kHz playback and 48 kHz noise-cancellation path with <500 µs total latency. |
| Digital Televisions | Studio Monitors |
Use Scenario: Slim TV with virtual surround sound and dialogue enhancement. IC Role / Device Role / Timing Role: Accepts HDMI ARC or SPDIF input, applies psychoacoustic widening and vocal clarity algorithms, outputs to stereo DACs. Use Value: Delivers immersive spatial audio from two drivers using head-related transfer function (HRTF) modeling in 56-bit precision. | Use Scenario: Active near-field monitor with calibrated frequency response and thermal drift compensation. IC Role / Device Role / Timing Role: Digitally corrects driver response using factory-loaded FIR filters stored in EEPROM; monitors internal temperature via auxiliary ADC. Use Value: Maintains ±0.25 dB amplitude accuracy across 20 Hz–20 kHz despite ambient temperature shifts from 0°C to 70°C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar audio DSP applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADAU1761JSTZ | Integrated stereo Class-D amplifier (1.4 W), lower SNR (94 dB ADC / 98 dB DAC), no auxiliary ADC | Better suited for space-constrained portable speakers requiring direct speaker drive | Select when amplifier integration reduces BOM count and thermal budget permits lower dynamic range |
| TAS5756MRTAT | Dedicated Class-D audio processor with integrated 4×10 W amplifier, fixed-function HD-Audio pipeline, no SigmaStudio programmability | Targeted at cost-sensitive consumer AV receivers needing high-output power without custom DSP tuning | Select when production volume justifies fixed-function optimization and programmability is not required |
Compared with ADAU1702JSTZ, ADAU1761JSTZ trades auxiliary ADC and highest SNR for on-chip amplification, while TAS5756MRTAT sacrifices SigmaStudio flexibility for higher output power and fixed audio pipeline efficiency-making ADAU1702JSTZ optimal for applications demanding field-upgradable, precision audio correction.
Availability
ADAU1702JSTZ is available at Aetrix Electronics and suitable for multimedia speaker systems, automotive head units, and digital televisions requiring stable component supply, long-term lifecycle support, and consistent parametric performance across production batches.
Supply support for ADAU1702JSTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision measurement and connectivity.
The ADAU1702JSTZ belongs to the SigmaDSP® family-designed specifically for embedded audio system correction, targeting applications where acoustic imperfections of transducers and enclosures must be digitally compensated in real time.
FAQ
What is the maximum sampling rate supported by the ADAU1702JSTZ?
The ADAU1702JSTZ supports sampling rates up to 192 kHz. This capability is confirmed in the General Description and Specifications sections of the Rev. D datasheet. At 192 kHz, the device maintains full 56-bit processing precision and supports all serial port modes (I²S, TDM, etc.). The PLL accepts corresponding master clock frequencies (e.g., 24.576 MHz for 128×fS). ADAU1702JSTZ achieves this without compromising SNR or THD+N performance across its ADC and DAC paths.
Does the ADAU1702JSTZ require an external microcontroller to operate?
No, the ADAU1702JSTZ supports standalone operation via self-boot from serial EEPROM. When SELFBOOT (Pin 6) is asserted high after reset, it automatically loads program and parameter data from an external EEPROM. Control registers and RAM contents can also be written back to EEPROM on power-down using the WB function on Pin 20. ADAU1702JSTZ does not require a host MCU for basic audio processing, though optional I²C or SPI communication remains available for runtime reconfiguration.
What are the power supply requirements for the ADAU1702JSTZ?
The ADAU1702JSTZ requires four independent supplies: AVDD and PVDD at 3.3 V (±10%), DVDD at 1.8 V (generated internally or supplied externally), and IOVDD at 3.3 V. The on-chip regulator uses VDRIVE (Pin 17) to drive an external PNP transistor for DVDD generation. Total typical power dissipation is 286.5 mW during operation (AVDD + DVDD + PVDD), with analog and digital currents specified as 50–85 mA and 40–60 mA respectively. ADAU1702JSTZ meets these requirements across 0°C to +70°C ambient.
How many channels of digital audio I/O does the ADAU1702JSTZ support?
The ADAU1702JSTZ supports up to eight channels of digital audio input and eight channels of digital audio output via configurable serial ports. These are implemented through multipurpose pins (MP0–MP11) that can be assigned as SDATA_IN0–1, SDATA_OUT0–3, INPUT_LRCLK/BCLK, OUTPUT_LRCLK/BCLK, or TDM lanes. The device supports I²S, left/right-justified, and TDM formats with programmable word length (16–24 bits) and channel count-enabling glueless interfacing with external ADCs, DACs, or other DSPs without additional logic.
Can the ADAU1702JSTZ perform real-time audio analysis such as FFT or spectrum display?
The ADAU1702JSTZ does not include hardware-accelerated FFT engines or dedicated spectrum analysis blocks. Its signal processing architecture is optimized for biquad filtering, dynamics processing, delay, and mixing-not general-purpose spectral computation. While custom FFT-like behavior could be approximated using cascaded filters and level detectors in SigmaStudio™, the device lacks native support for frame-based FFT, windowing, or complex arithmetic. Real-time spectrum visualization requires external host processing; ADAU1702JSTZ focuses on deterministic, low-latency audio correction rather than analysis.
ADAU1702JSTZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- SigmaDSP®
- Package/Case:
- 48-LQFP
- Packaging:
- Tray
- Product Status:
- Active
- Type:
- Sigma
- Interface:
- I2C, SPI
- Clock Rate:
- 25MHz
- Non-Volatile Memory:
- -
- On-Chip RAM:
- 3kB
- Voltage - I/O:
- 3.30V
- Voltage - Core:
- 1.80V
- Operating Temperature:
- 0°C ~ 70°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 48-LQFP (7x7)
ADAU1702JSTZ FAQ
1.How can I place an order for ADAU1702JSTZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADAU1702JSTZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADAU1702JSTZ reliable?
The price and inventory of ADAU1702JSTZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADAU1702JSTZ is usually 5 days.
3.What payment methods are accepted for ADAU1702JSTZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADAU1702JSTZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADAU1702JSTZ?
ADAU1702JSTZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADAU1702JSTZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADAU1702JSTZ?
For technical support, including ADAU1702JSTZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADAU1702JSTZ requirements.
6.How does Aetrix verify that ADAU1702JSTZ is sourced from the original manufacturer or authorized distributors?
All ADAU1702JSTZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADAU1702JSTZ meets industry standards.
7.What is the process for return or replacement of ADAU1702JSTZ?
All ADAU1702JSTZ units undergo pre-shipment inspection (PSI). If there is an issue with ADAU1702JSTZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADAU1702JSTZ part is unused and in its original packaging.
Return procedure for ADAU1702JSTZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADAU1702JSTZ Tags
-
TMS320C5535AZAY10
Texas Instruments

-
TMS320VC5501PGF300
Texas Instruments

-
ADSP-BF592KCPZ
Analog Devices Inc.

-
ADAU1463WBCPZ150
Analog Devices Inc.

-
TMS320VC5402PGE100
Texas Instruments

-
ADAU1701JSTZ-RL
Analog Devices Inc.

-
ADAU1701JSTZ
Analog Devices Inc.

-
TMS320VC5502PGF300
Texas Instruments

-
ADAU1462WBCPZ300RL
Analog Devices Inc.

-
ADAU1452KCPZRL
Analog Devices Inc.

-
ADAU1452WBCPZ-RL
Analog Devices Inc.

-
TMS320C6747DZKB3
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
