Analog Devices Inc. ADAU1702JSTZ-RL

Overview

ADAU1702JSTZ-RL from Analog Devices is a 28-/56-bit SigmaDSP audio processor with two 24-bit Σ-Δ ADCs (SNR = 100 dB, THD+N = −83 dB) and four 24-bit Σ-Δ DACs (SNR = 104 dB, THD+N = −90 dB), operating at sampling rates up to 192 kHz. It integrates on-chip PLL, crystal oscillator, 1.8 V regulator, and GPIOs for standalone audio system implementation in speaker crossovers and automotive head units.

For engineers reviewing the ADAU1702JSTZ-RL datasheet, ADAU1702JSTZ-RL pinout, ADAU1702JSTZ-RL application, or ADAU1702JSTZ-RL equivalent, key selection criteria include its self-boot capability from serial EEPROM, I²C/SPI control interface, 48-lead LQFP package, and full 56-bit double-precision signal processing architecture supporting equalization, dynamics, delay, and speaker compensation.

Technical Context

The ADAU1702JSTZ-RL implements a dedicated 25 MIPS audio DSP core with 28-bit × 28-bit multiplier and 56-bit accumulator, enabling full double-precision arithmetic for low-level signal fidelity. Its analog front-end includes two current-input ADCs with 100 dB A-weighted SNR and four voltage-output DACs with 104 dB A-weighted SNR, all referenced to 1.5 V common-mode.

Digital timing supports I²S, left/right-justified, and TDM modes across eight serial input/output channels. The integrated PLL accepts master clock inputs at 64×f_S, 256×f_S, 384×f_S, or 512×f_S, while the on-chip oscillator generates MCLK from an external crystal - both enabling flexible clock tree design without external timing ICs.

Key Specifications

Pinout & Package

ADAU1702JSTZ-RL uses a 48-lead plastic LQFP package (7 mm × 7 mm, 0.5 mm pitch) with exposed pad for thermal management. Pin functions support dual-role multipurpose I/O, dedicated analog inputs/outputs, PLL configuration, reset, self-boot enable, and voltage regulation drive.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar audio DSP applications.

Compared with ADAU1702JSTZ-RL, ADAU1452WBCPZ-RL offers higher compute throughput and expanded I/O but demands more complex power sequencing and PCB layout; TAS5825MRTWR trades programmability for integrated amplifier control and lower BOM cost in volume consumer audio.

Availability

ADAU1702JSTZ-RL is available at Aetrix Electronics and suitable for multimedia speaker systems, automotive head units, and studio monitors requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for ADAU1702JSTZ-RL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, industrial automation, and audio systems.

The ADAU1702JSTZ-RL belongs to Analog Devices' SigmaDSP family, designed specifically for embedded audio signal conditioning - delivering studio-grade processing in compact, self-contained ICs for consumer, automotive, and pro-audio equipment.

FAQ

What is the maximum supported sampling rate for ADAU1702JSTZ-RL?

The ADAU1702JSTZ-RL supports sampling rates up to 192 kHz, verified in the Rev. D datasheet Table 1 and Figure 2 timing diagrams. This enables high-resolution audio playback and recording in applications such as studio monitors and digital televisions. The PLL accepts MCLK inputs at 64×, 256×, 384×, or 512× f_S, allowing direct use of standard crystals (e.g., 12.288 MHz for 192 kHz). ADAU1702JSTZ-RL maintains full 56-bit processing precision at all supported rates.

Does ADAU1702JSTZ-RL require an external EEPROM to operate?

No, ADAU1702JSTZ-RL does not require external EEPROM to function, but it relies on one for self-boot operation. When SELFBOOT is high, the device loads firmware and parameters from an external serial EEPROM at power-up. Without EEPROM, ADAU1702JSTZ-RL enters control-port mode and waits for configuration via I²C or SPI from a host microcontroller. The datasheet confirms this behavior in the Self-Boot section (Page 27) and Pin 6 description.

What are the analog input and output voltage ranges for ADAU1702JSTZ-RL?

ADAU1702JSTZ-RL uses current-input ADCs (100 µA rms full-scale) and voltage-output DACs (0.9 V rms full-scale). With an 18 kΩ external resistor, ADC0/ADC1 achieve 2 V rms input range; DAC outputs VOUT0–VOUT3 deliver 0.9 V rms (2.5 V p-p) into high-impedance loads. Common-mode voltage is fixed at 1.5 V (±0.1 V), as specified in Table 1 (Voltage Reference) and Pin Descriptions (Page 11).

Can ADAU1702JSTZ-RL generate its own master clock without an external crystal?

No, ADAU1702JSTZ-RL cannot generate a master clock without an external timing source. It requires either an external crystal connected between OSCO and GND (1–20 MHz range) or an externally supplied MCLK signal (e.g., from a clock generator IC). The on-chip oscillator circuit provides transconductance (g_m = 78 mmho) but needs the crystal to resonate; no internal RC oscillator is present. This is confirmed in Table 4 (PLL and Oscillator) and Figure 1 functional block diagram.

How many GPIOs does ADAU1702JSTZ-RL provide, and what are their voltage levels?

ADAU1702JSTZ-RL provides 12 multipurpose pins (MP0–MP11) configurable as GPIOs, each operating at IOVDD voltage level (3.3 V). These pins support push-pull or open-drain output (2 mA drive strength) and TTL-compatible input thresholds (VIH ≥ 2.0 V, VIL ≤ 0.8 V), as defined in Table 2 (Digital Input/Output) and Pin Descriptions (Page 11–12). All GPIO functionality is software-configurable via SigmaStudio or register writes.