Texas Instruments ADC0820CCWMX/NOPB
- Part No.:
- ADC0820CCWMX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
ADC0820CCWMX/NOPB.pdf
- Description:
- IC ADC 8BIT FLASH 20SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:1,369
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Product details
Overview
ADC0820CCWMX/NOPB from Texas Instruments is an 8-bit CMOS analog-to-digital converter with integrated track-and-hold, designed for high-speed µP-compatible data acquisition. It delivers 1.5 µs conversion time in WR-RD mode, operates on a single 5 V supply, features latched TRI-STATE outputs, and supports ratiometric operation with 0 V to 5 V analog input range-used in telecom front-ends and real-time sensor digitization.
For engineers reviewing the ADC0820CCWMX/NOPB datasheet, ADC0820CCWMX/NOPB pinout, ADC0820CCWMX/NOPB application, or ADC0820CCWMX/NOPB equivalent, key selection considerations include its half-flash architecture, no-missing-codes performance, RD/WR interface timing, overflow flag for cascading, and SOIC-20 package compatibility with industrial embedded systems.
Technical Context
The ADC0820CCWMX/NOPB implements a two-stage half-flash architecture: a 4-bit MS flash ADC followed by a 4-bit LS flash ADC, sharing a common resistor ladder and sampled-data comparators. This enables simultaneous sampling of VIN during WR assertion, eliminating external sample-and-hold requirements for signals up to 100 mV/µs slew rate.
It supports two distinct interface modes selected via the MODE pin: RD mode (conversion initiated on falling RD edge) and WR-RD mode (conversion starts on falling WR, data read on falling RD). Both modes deliver latched TRI-STATE digital outputs (DB0–DB7), overflow flag (OFL), interrupt (INT), and ready (RDY) signals compatible with 8-bit microprocessor buses.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 8 bits with no missing codes-guarantees monotonic transfer function for accurate linear measurement. |
| Conversion Time | 1.5 µs max in WR-RD mode-enables ≥667 kSPS throughput without external clocking or timing control logic. |
| Total Unadjusted Error | ±1 LSB max-covers offset, full-scale, and linearity errors at TA = 0°C to +70°C, supporting direct use without calibration. |
| Supply Voltage | 4.5 V to 8 V-allows operation from standard 5 V rails with margin for ripple or drop; supports ratiometric reference configurations. |
| Analog Input Range | 0 V to VCC-simplifies signal conditioning when using single-supply op-amps or transducers referenced to ground. |
| Power Dissipation | 75 mW max at VCC = 5 V-enables dense PCB layouts and low-thermal-load data acquisition subsystems. |
| Reference Flexibility | VREF(−) and VREF(+) fully differential-permits offset-adjusted spans (e.g., 1 V to 3 V) and eliminates need for external reference ICs. |
Pinout & Package
ADC0820CCWMX/NOPB is housed in a 20-pin SOIC (Small Outline Integrated Circuit) package with 0.3-inch body width and standard JEDEC MS-013AC footprint-compatible with automated SMT assembly and industrial thermal cycling profiles.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VIN (Pin 1) | Analog input | Accepts 0 V to VCC single-ended signal; internal sampled-data comparators sample at WR rising edge with inherent 100 ns aperture window. |
| DB0–DB7 (Pins 2–5, 14–17) | TRI-STATE digital output | 8-bit parallel data bus; outputs enter high-impedance state when CS high or during conversion-enables direct connection to shared µP data bus. |
| WR / RDY (Pin 6) | Mode-shared control / status | In WR-RD mode: falling edge initiates conversion; in RD mode: open-drain RDY indicates busy state and transitions to Hi-Z on data latch. |
| MODE (Pin 7) | Interface mode select | Internally pulled down; strapping high selects WR-RD mode (faster, interrupt-ready); low selects RD mode (simpler, self-timed). |
| RD (Pin 8) | Data strobe / enable | Falling edge reads latched result in RD mode; in WR-RD mode, early RD (<800 ns after WR) triggers immediate data latch and INT assertion. |
| INT (Pin 9) | Conversion complete flag | Active-low open-drain interrupt; resets on rising edge of RD or CS-supports polled or interrupt-driven µP firmware architectures. |
| OFL (Pin 18) | Overflow indicator | Active-low output asserted when VIN > VREF(+); remains active (non-TRI-STATE) to support cascading for 9+ bit resolution. |
| VREF(−), VREF(+) (Pins 11–12) | Differential reference inputs | Define zero/full-scale endpoints; support ratiometric operation (e.g., VREF(+) = VCC, VREF(−) = GND) or precision external references. |
| CS (Pin 13) | Chip select | Active-low enable; must be low for WR/RD recognition-allows multiple converters on same bus with address decoding. |
| GND (Pin 10), VCC (Pin 20) | Power supply | Single 5 V supply rail; decoupling required within 1 cm of pins to maintain 75 mW power integrity and noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in track-and-hold function | Eliminates need for external S/H circuitry-VIN is sampled inherently during WR assertion, enabling accurate digitization of 7 kHz sine waves without auxiliary components. |
| No external clocking required | Self-timed conversion engine uses internal logic delays-removes clock distribution complexity and jitter sensitivity in µP-based systems. |
| Latched TRI-STATE outputs | DB0–DB7 remain stable post-conversion and enter Hi-Z when inactive-prevents bus contention and simplifies glueless interfacing to 8051, Z80, or 68K families. |
| Overflow output (OFL) | Dedicated active-low flag tied directly to comparator bank-enables seamless cascading of two ADC0820CCWMX/NOPB units for 9-bit resolution without external logic. |
| Ratiometric operation support | VREF(−)/VREF(+) accept any voltage ≤ VCC-allows transducer excitation and A/D reference from same 5 V rail, rejecting supply drift in bridge sensor applications. |
Applications
| Telecom Signal Digitization | Industrial Sensor Interface |
|---|---|
|
Use Scenario: Digitizing voice-band analog signals (0–4 kHz) in channel banks and PCM codecs. IC Role / Device Role / Timing Role: Primary A/D converter capturing real-time waveform samples with minimal latency and no missing codes. Use Value: 1.5 µs WR-RD conversion time supports >667 kSPS sampling-exceeding Nyquist requirement for 320 kHz oversampling in telecom front-ends. |
Use Scenario: Converting outputs from strain gauges, RTDs, and pressure transducers in PLC analog input modules. IC Role / Device Role / Timing Role: Standalone µP-compatible ADC handling multi-channel multiplexed inputs with ratiometric reference stability. Use Value: VREF(−)/VREF(+) differential inputs enable offset-span adjustment-eliminating calibration potentiometers in factory-configured I/O cards. |
| Embedded Data Acquisition | Test & Measurement Front-End |
|
Use Scenario: Real-time voltage/current monitoring in motor drives and power supplies with onboard µC control. IC Role / Device Role / Timing Role: High-speed ADC interfaced directly to 8-bit microcontroller data bus via RD/WR handshaking. Use Value: Latched TRI-STATE outputs and INT flag allow deterministic firmware polling-reducing ISR overhead and enabling sub-2 µs response to overvoltage events. |
Use Scenario: Building portable oscilloscope or DMM front-ends requiring compact, low-power digitization. IC Role / Device Role / Timing Role: Core A/D element in battery-powered instruments where board space and thermal management are constrained. Use Value: 75 mW max power dissipation and SOIC-20 footprint enable integration into handheld enclosures without heatsinking or forced air. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit high-speed µP-compatible A/D converter applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MAX1112CPE+ | Serial SPI interface, 2.7–5.25 V supply, 100 kSPS max-slower but lower power (12 mW) and smaller QSOP-16 package. | Best suited for low-pin-count, low-throughput designs where serial interface reduces µC GPIO usage. | Select MAX1112CPE+ when system-level SPI bus exists and conversion speed <100 kSPS suffices; avoid for parallel-bus µP systems. |
| AD7820KNZ | 8-bit CMOS, 1.5 µs conversion, but requires external clock and lacks built-in track-and-hold-needs external S/H and timing generator. | Used in legacy test equipment where clock distribution is already present and board area allows discrete S/H. | Select AD7820KNZ only if existing design infrastructure supports external clocking and S/H; ADC0820CCWMX/NOPB offers superior integration. |
Compared with MAX1112CPE+ and AD7820KNZ, ADC0820CCWMX/NOPB uniquely combines parallel µP interface, self-timed 1.5 µs conversion, and integrated track-and-hold in a single SOIC-20 package-reducing BOM count, layout complexity, and firmware overhead for real-time embedded acquisition.
Availability
ADC0820CCWMX/NOPB is available at Aetrix Electronics and suitable for telecom infrastructure, industrial PLC analog input modules, and embedded motor control systems requiring stable component supply across extended production lifecycles.
Supply support for ADC0820CCWMX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies-with decades of expertise in precision data converters and industrial-grade ICs.
ADC0820CCWMX/NOPB belongs to TI's legacy high-speed ADC family, engineered for µP-compatible data acquisition in cost-sensitive, space-constrained industrial and telecom applications where integration, reliability, and ease of interface are critical.
FAQ
What is the maximum analog input slew rate supported by ADC0820CCWMX/NOPB without external sample-and-hold?
The ADC0820CCWMX/NOPB supports analog input signals with slew rates up to 100 mV/µs without external sample-and-hold circuitry due to its inherent sampled-data comparator architecture and synchronized MS/LS flash sampling. This capability enables accurate digitization of 5 V, 7 kHz sine waves-verified in TI's typical performance curves (Figure 34)-making ADC0820CCWMX/NOPB suitable for real-time waveform capture in telecom and sensor front-ends.
Does ADC0820CCWMX/NOPB require an external clock source for operation?
No, ADC0820CCWMX/NOPB does not require an external clock source. Its half-flash conversion engine uses internal logic propagation delays to self-time both stages of conversion. In RD mode, timing is triggered by the falling edge of RD; in WR-RD mode, WR initiation and optional RD strobe provide all necessary timing-eliminating clock generation, distribution, and jitter concerns in µP-based systems using ADC0820CCWMX/NOPB.
How does the OFL (overflow) pin function in ADC0820CCWMX/NOPB, and can it be used for cascading?
The OFL pin in ADC0820CCWMX/NOPB is an active-low, non-TRI-STATE output that asserts when VIN exceeds VREF(+). As documented in TI's functional description and Figure 30, OFL is explicitly designed for cascading: its output drives the MODE or CS of a second ADC0820CCWMX/NOPB to extend resolution to 9 bits. This hardware-level chaining requires no firmware intervention and maintains timing coherence between devices-confirming ADC0820CCWMX/NOPB's role in scalable precision architectures.
What are the operating temperature limits for ADC0820CCWMX/NOPB, and which grade does the /NOPB suffix indicate?
ADC0820CCWMX/NOPB is rated for 0°C to +70°C ambient operating temperature (Commercial grade), as specified for the CCWM variant in the Operating Ratings table. The /NOPB suffix denotes lead-free (RoHS-compliant) packaging with matte tin lead finish-fully compatible with standard SnPb and lead-free reflow profiles. This grade targets industrial control panels, test equipment, and telecom line cards where extended temperature operation is not required but regulatory compliance is mandatory.
Can ADC0820CCWMX/NOPB operate with a reference voltage less than VCC, and what is the minimum VREF span?
Yes, ADC0820CCWMX/NOPB supports ratiometric operation with VREF(+) − VREF(−) as low as 1.00 kΩ minimum reference resistance (per DC Electrical Characteristics), and the datasheet confirms operation with any reference value ≤ VCC. The minimum usable VREF span is effectively limited by noise and LSB size: at 1 V span, 1 LSB = 3.9 mV, enabling high-resolution measurement of low-voltage transducer outputs-validated in TI's Accuracy vs. VREF plot (Figure 14) for ADC0820CCWMX/NOPB.
ADC0820CCWMX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 8
- Sampling Rate (Per Second):
- -
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Flash
- Reference Type:
- External
- Voltage - Supply, Analog:
- 4.5V ~ 8V
- Voltage - Supply, Digital:
- 4.5V ~ 8V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 20-SOIC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADC0820CCWMX/NOPB FAQ
1.How can I place an order for ADC0820CCWMX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for ADC0820CCWMX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADC0820CCWMX/NOPB reliable?
The price and inventory of ADC0820CCWMX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADC0820CCWMX/NOPB is usually 5 days.
3.What payment methods are accepted for ADC0820CCWMX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADC0820CCWMX/NOPB transactions.
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ADC0820CCWMX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADC0820CCWMX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADC0820CCWMX/NOPB?
For technical support, including ADC0820CCWMX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADC0820CCWMX/NOPB requirements.
6.How does Aetrix verify that ADC0820CCWMX/NOPB is sourced from the original manufacturer or authorized distributors?
All ADC0820CCWMX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADC0820CCWMX/NOPB meets industry standards.
7.What is the process for return or replacement of ADC0820CCWMX/NOPB?
All ADC0820CCWMX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with ADC0820CCWMX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADC0820CCWMX/NOPB part is unused and in its original packaging.
Return procedure for ADC0820CCWMX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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