Texas Instruments ADC08D1520CIYB/NOPB
- Part No.:
- ADC08D1520CIYB/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 128-LQFP Exposed Pad
- Datasheet:
-
ADC08D1520CIYB/NOPB.pdf
- Description:
- IC ADC 8BIT FOLD INTERP 128HLQFP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
ADC08D1520CIYB/NOPB from Texas Instruments is a dual, low-power, 8-bit CMOS analog-to-digital converter capable of 1.5 GSPS per channel (or 3.0 GSPS interleaved), operating from a single +1.9 V ±0.1 V supply, delivering 7.4 ENOB at 748 MHz input with 10⁻¹⁸ code error rate, and used in direct RF down-conversion and high-speed test instrumentation.
For engineers reviewing the ADC08D1520CIYB/NOPB datasheet, ADC08D1520CIYB/NOPB pinout, ADC08D1520CIYB/NOPB application, or ADC08D1520CIYB/NOPB equivalent, key selection considerations include its dual-channel 1.5 GSPS operation, LVDS output formatting with selectable SDR/DDR clocking, 1:1 or 1:2 demux modes, duty-cycle-corrected sample clock, and industrial temperature range support (–40°C to +85°C).
Technical Context
The ADC08D1520CIYB/NOPB employs a folding-and-interpolating architecture with fully differential comparators and an innovative sample-and-hold amplifier, enabling flat dynamic performance beyond Nyquist. It supports interleave mode for 3.0 GSPS single-channel operation and multiple-ADC synchronization via DCLK_RST signals.
It features dual independent 8-bit ADC cores with programmable full-scale range (via FSR pin or register), adjustable clock phase and offset, and on-command self-calibration. Output formatting is offset binary with IEEE 1596.3-compliant LVDS drivers (adjustable common-mode 0.8–1.2 V) feeding 16 LVDS data pairs per channel.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 8 bits with guaranteed no missing codes over full industrial temperature range |
| Max Conversion Rate | 1.5 GSPS per channel (dual mode); up to 3.0 GSPS when interleaved as single ADC |
| ENOB @ 748 MHz | 7.4 bits typical - enables accurate digitization of wideband RF signals near Nyquist |
| Code Error Rate | 10⁻¹⁸ typical - ensures ultra-low bit error probability in mission-critical sampling |
| Power Consumption | 1.6 W typical in non-demux mode at 1.0 GSPS; 2.0 W in 1:2 demux mode |
| DNL | ±0.15 LSB typical - maintains linearity critical for spectral purity in communications |
| Supply Voltage | +1.9 V ±0.1 V single supply - simplifies power delivery versus multi-rail alternatives |
Pinout & Package
ADC08D1520CIYB/NOPB is housed in a thermally enhanced 128-pin HLQFP package with exposed thermal pad requiring soldering to ground plane for rated performance. Pin count and layout match TI's documented 128-pin configuration with dedicated VA/VDR power domains, dual LVDS data buses (DI/DQ and DId/DQd), and control pins for calibration, power-down, and synchronization.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CLK+/CLK− | Differential sampling clock input | Accepts ac-coupled 0.4–2.0 VP-P clock; sampling occurs on CLK+ falling edge |
| VINI+/VINI−, VINQ+/VINQ− | Differential analog inputs (I & Q channels) | Supports programmable full-scale range (650–940 mVP-P) and common-mode voltage control via VCMO |
| DCLK+/DCLK−, OR+/OR− | Differential output clock and out-of-range indicator | DCLK latches LVDS data; OR indicates input saturation across both channels unless PDQ asserted |
| DI0+/DI0− … DI7+/DI7− DQ0+/DQ0− … DQ7+/DQ7− | Non-delayed LVDS data outputs | Active in non-demux mode; carry latest time samples; require 100 Ω differential termination |
| DId0+/DId0− … DId7+/DId7− DQd0+/DQd0− … DQd7+/DQd7− | Delayed LVDS data outputs | Active only in 1:2 demux mode; represent earlier time samples; high-impedance in non-demux mode |
| PD, PDQ, CAL, FSR/ALT_ECE | Control and configuration inputs | Enable full-device or Q-channel power-down, initiate calibration, select full-scale range or extended control mode |
Key Features
| Feature | Design Value |
|---|---|
| Interleave Mode Support | Enables dual-core synchronization to function as a single 3.0 GSPS ADC without external timing alignment circuitry |
| Selectable Output Demux (1:1 or 1:2) | Reduces output data rate per bus by half in 1:2 mode-eases FPGA interface timing closure at high sample rates |
| Duty Cycle Corrected Sample Clock | Internally stabilizes clock duty cycle to maintain sampling aperture accuracy and minimize jitter-induced distortion |
| Multiple ADC Synchronization | DCLK_RST+/DCLK_RST− pins allow deterministic phase alignment across multiple ADC08D1520CIYB/NOPB devices |
| Test Pattern Output | Generates known digital sequences for system-level debug and signal path validation without external pattern generator |
Applications
| Direct RF Down Conversion | Digital Oscilloscopes |
|---|---|
Use Scenario: Digitizing IF or RF signals directly at GHz frequencies in software-defined radio front ends. IC Role / Device Role / Timing Role: Dual-channel 1.5 GSPS ADC capturing I/Q baseband components with 7.4 ENOB at 748 MHz. Use Value: Eliminates analog quadrature demodulator stage, reducing component count and phase-matching errors while preserving SNR. | Use Scenario: High-bandwidth real-time waveform acquisition in benchtop and portable oscilloscopes. IC Role / Device Role / Timing Role: Primary sampling engine providing 3.0 GSPS interleaved capture with <10⁻¹⁸ code error rate. Use Value: Enables >1 GHz analog bandwidth measurement with minimal amplitude distortion and spurious-free dynamic range >55 dB. |
| Satellite Set-top Boxes | Communications Systems |
Use Scenario: Tuner IF digitization in multi-standard satellite receivers handling DVB-S2/S2X waveforms. IC Role / Device Role / Timing Role: Low-power 8-bit ADC supporting 1.5 GSPS dual-channel operation with adjustable input full-scale range. Use Value: Accommodates varying LNB output levels via FSR pin control while maintaining ENOB >7.3 at 500 MHz input. | Use Scenario: Wideband receiver digitization in 5G massive MIMO base station test equipment and radar simulators. IC Role / Device Role / Timing Role: High-speed data converter interfacing with FPGA-based digital downconverters using LVDS DDR outputs. Use Value: 16 LVDS data pairs per channel with selectable SDR/DDR clocking simplify high-throughput interface design to Xilinx/Kintex Ultrascale+. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADC08D1000CIYB | Lower max sample rate (1.0 GSPS dual / 2.0 GSPS interleaved); identical 8-bit resolution and LVDS interface | Targeted at cost-sensitive or lower-bandwidth systems where 1.5 GSPS is not required | Choose when full 1.5 GSPS capability is unnecessary and power budget is tighter (1.2 W typical vs. 1.6 W) |
| ADS54J60IRGC | 14-bit resolution, 500 MSPS; JESD204B serial interface instead of parallel LVDS; higher SNR but lower sample rate | Better suited for high-fidelity IF sampling where resolution outweighs speed, e.g., medical imaging or spectrum analyzers | Prefer when system requires >70 dB SNR and can accept serial interface complexity and reduced throughput |
Compared with ADC08D1000CIYB and ADS54J60IRGC, ADC08D1520CIYB/NOPB uniquely balances 1.5 GSPS dual-channel speed, 8-bit precision, parallel LVDS simplicity, and sub-2W power-making it optimal for RF instrumentation and real-time signal analysis where timing determinism and interface ease are critical.
Availability
ADC08D1520CIYB/NOPB is available at Aetrix Electronics and suitable for direct RF down conversion, digital oscilloscopes, satellite set-top boxes, and communications systems requiring stable component supply across industrial temperature ranges and long production lifecycles.
Supply support for ADC08D1520CIYB/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters, with decades of innovation in high-speed ADC architectures.
The ADC08D1520CIYB/NOPB belongs to TI's ultra-high-speed pipeline ADC family designed specifically for RF-sampling and real-time test instrumentation applications demanding GHz-rate digitization with low power and deterministic latency.
FAQ
What is the maximum guaranteed sample rate for ADC08D1520CIYB/NOPB in dual-channel mode?
The ADC08D1520CIYB/NOPB is guaranteed to operate at up to 1.5 GSPS per channel in dual-channel mode, as specified in the datasheet under "Max Conversion Rate." This rating holds across the full industrial temperature range (–40°C to +85°C) with proper power supply decoupling and thermal management via the exposed pad.
Does ADC08D1520CIYB/NOPB support interleaving to achieve 3.0 GSPS operation?
Yes, ADC08D1520CIYB/NOPB supports interleave mode where its two internal 8-bit ADC cores are synchronized to function as a single 3.0 GSPS converter. This requires precise clock and reset alignment using the DCLK_RST+/DCLK_RST− pins and is validated in TI's application notes for multi-ADC synchronization.
What LVDS output standards does ADC08D1520CIYB/NOPB comply with?
ADC08D1520CIYB/NOPB LVDS outputs comply with IEEE 1596.3-1996, with the exception of an adjustable common-mode voltage range (0.8 V to 1.2 V). The driver supports both SDR and DDR clocking modes, and all 16 LVDS data pairs per channel require 100 Ω differential termination for signal integrity.
Can ADC08D1520CIYB/NOPB operate with a 1.8 V supply instead of 1.9 V?
Yes, ADC08D1520CIYB/NOPB operates within the guaranteed supply range of +1.8 V to +2.0 V for VA and VDR. Performance specifications-including ENOB, SINAD, and code error rate-are characterized at 1.9 V, but functional operation is assured across the full 1.8–2.0 V range per the Operating Ratings table.
How is full-scale input range configured on ADC08D1520CIYB/NOPB?
ADC08D1520CIYB/NOPB supports full-scale input range selection via the FSR pin (Pin 14) in non-extended control mode: logic low sets 650–730 mVP-P, logic high sets 800–940 mP-P. In extended control mode, the Input Full-Scale Voltage Adjust register provides finer programmability, and FSR functionality is disabled when DRST_SEL = logic low.
ADC08D1520CIYB/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 128-LQFP Exposed Pad
- Packaging:
- Tray
- Product Status:
- Active
- Number of Bits:
- 8
- Sampling Rate (Per Second):
- 3G
- Number of Inputs:
- 2
- Input Type:
- Differential
- Data Interface:
- LVDS - Parallel
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Folding Interpolating
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 1.8V ~ 2V
- Voltage - Supply, Digital:
- 1.8V ~ 2V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 128-HLQFP (20x20)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADC08D1520CIYB/NOPB FAQ
1.How can I place an order for ADC08D1520CIYB/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for ADC08D1520CIYB/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADC08D1520CIYB/NOPB reliable?
The price and inventory of ADC08D1520CIYB/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADC08D1520CIYB/NOPB is usually 5 days.
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ADC08D1520CIYB/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
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5.How can I obtain technical support or documentation for ADC08D1520CIYB/NOPB?
For technical support, including ADC08D1520CIYB/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADC08D1520CIYB/NOPB requirements.
6.How does Aetrix verify that ADC08D1520CIYB/NOPB is sourced from the original manufacturer or authorized distributors?
All ADC08D1520CIYB/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADC08D1520CIYB/NOPB meets industry standards.
7.What is the process for return or replacement of ADC08D1520CIYB/NOPB?
All ADC08D1520CIYB/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with ADC08D1520CIYB/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADC08D1520CIYB/NOPB part is unused and in its original packaging.
Return procedure for ADC08D1520CIYB/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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