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Home > Products > Integrated Circuits (ICs) > Data Acquisition > Analog to Digital Converters (ADC)

Texas Instruments ADC10D020CIVS

Name: ADC10D020CIVS
Brand: Texas Instruments
SKU: ADC10D020CIVS
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: ADC10D020CIVS

Manufacturer:: Texas Instruments

Category:: Analog to Digital Converters (ADC)

Package:: 48-TQFP

Datasheet:: ADC10D020CIVS.pdf

Description:: IC ADC 10BIT TWO-STEP 48TQFP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

ADC10D020CIVS from Texas Instruments is a dual-channel, 10-bit, 20 MSPS analog-to-digital converter with internal sample-and-hold, 9.5 ENOB at 20 MHz, 150 mW typical power consumption at 3.0 V, and operation over −40°C to +85°C. It digitizes differential analog inputs (I+/I− and Q+/Q−) for I/Q signal processing in high-speed portable instrumentation and ultrasound systems.

For engineers reviewing the ADC10D020CIVS datasheet, ADC10D020CIVS pinout, ADC10D020CIVS application, or ADC10D020CIVS equivalent, key selection considerations include dual-channel latency (2.5/3.0 clock cycles), selectable offset binary or 2's complement output format, multiplexed vs. parallel 10-/20-bit bus configuration, gain-selectable full-scale input range (1 VP-P or 2 VP-P), and low-power standby (<1 mW) and fast-recovery standby (27 mW, 800 ns wake-up) modes.

Technical Context

The ADC10D020CIVS employs a two-stage pipeline architecture delivering 9.5 effective bits across the full Nyquist band up to 20 MHz input frequency. Its dual independent ADC cores share a common clock (CLK, falling-edge sampled) and support synchronized or independent offset correction via OC pin.

It features separate analog (VA), digital (VD), and output driver (VDR) supply domains - VDR configurable from +1.5 V to VD - enabling interface compatibility with 1.5 V–3.6 V logic families. Input common-mode voltage is set by VCMO (1.5 V nominal, 1 mA source capability) and scaled by GAIN pin state relative to VREF (0.8–1.5 V).

Key Specifications

Parameter	Value and Actual Design Meaning
Resolution	10 bits with guaranteed no missing codes over −40°C to +85°C - ensures monotonicity in closed-loop control and precision measurement.
Sampling Rate	20 MSPS maximum sustained rate - supports real-time digitization of baseband I/Q signals up to 10 MHz bandwidth.
ENOB	9.5 bits (typical at f_IN = 19.5 MHz) - defines usable dynamic range for SNR-critical applications like medical imaging.
DNL	±0.35 LSB (typical) - limits code-dependent gain error in amplitude-sensitive applications such as CCD imaging.
Power Consumption	150 mW (typ, normal operation), <1 mW (typ, power-down), 27 mW (typ, standby) - enables battery-powered portable instrumentation with rapid mode switching.
Conversion Latency	2.5 clock cycles (I-data, parallel mode), 3.0 clock cycles (Q-data, multiplexed mode) - determines minimum system-level pipeline delay for timing-critical feedback loops.
PSRR	90 dB (DC PSRR) - suppresses supply-induced gain drift in single-supply industrial environments with noisy rails.

Pinout & Package

The ADC10D020CIVS is housed in a 48-pin TQFP (PFB package) with exposed thermal pad. Analog, digital, and output driver supplies are physically separated to minimize coupling; AGND/DGND/DR GND pins must be tied together near the package per layout guidelines.

Pin/Terminal	Circuit Role	Design Meaning
I+, I− / Q+, Q−	Differential analog inputs	Two independent 10-bit ADC channels; full-scale range = VREF (GAIN = low) or 2×VREF (GAIN = high); common-mode set by VCMO.
VREF	Analog reference input	0.8–1.5 V reference voltage setting full-scale gain; bypassed with ≥1 µF capacitor; directly scales input sensitivity.
VCMO	Common-mode output	1.5 V ±0.15 V buffered output (1 mA drive) used to bias differential inputs; requires 1 µF + 0.1 µF bypassing.
CLK	Master sampling clock	Falling-edge triggered; supports 1–30 MHz; aperture jitter <10 ps RMS ensures low-noise sampling at Nyquist.
OS	Output select	High = parallel 10-bit I- and Q-buses active; Low = time-multiplexed 10-bit bus with I/Q control signal.
OF	Output format	Low = offset binary; High = 2's complement - enables direct interface to DSPs or FPGAs without external logic.
OC	Offset correction trigger	Edge-triggered; initiates 34-cycle auto-calibration per channel; requires 0 V differential input during calibration window.
STBY / PD	Power management	STBY high = 27 mW standby (800 ns wake-up); PD high = <1 mW shutdown (<1 ms wake-up); PD dominates if both asserted.
I0–I9 / Q0–Q9	Digital outputs	LVCMOS-compatible; driven from VDR (1.5–3.6 V); I0/Q0 = LSB; I9/Q9 = MSB; timing referenced to CLK rising edge.
VDR	Output driver supply	Independent 1.5–3.6 V rail decouples output switching noise from core logic; bypassed with 10–50 µF + 0.1 µF.

Key Features

Feature	Design Value
Dual independent ADC cores	Enables simultaneous I/Q sampling without interleaving artifacts - critical for zero-IF receivers and quadrature demodulation.
Selectably multiplexed or parallel output bus	Reduces PCB trace count in space-constrained designs (multiplexed) or maximizes throughput in FPGA-connected systems (parallel).
Internal offset correction	Hardware-initiated per-channel calibration eliminates manual trimming and compensates for process/temp drift in field-deployed equipment.
Gain-selectable full-scale range	Switches between 1 VP-P and 2 VP-P input span via GAIN pin - simplifies front-end design across varying sensor output levels.
Three power states (active/standby/shutdown)	Supports dynamic power scaling in battery-operated devices: 27 mW standby preserves state while cutting power >80% vs. active mode.

Applications

Ultrasound Imaging	CCD Imaging Systems
Use Scenario: Digitizing analog I/Q echo return signals from phased-array transducers at 20 MSPS for beamforming and Doppler processing. IC Role / Device Role / Timing Role: Dual-channel ADC capturing synchronized in-phase and quadrature components with <10 ps aperture jitter to preserve phase coherence. Use Value: 9.5 ENOB at 20 MHz enables accurate tissue characterization; low-latency 2.5-cycle I-data path supports real-time scan-line rendering.	Use Scenario: Converting pixel charge outputs from linear or area CCD sensors in portable document scanners and industrial inspection cameras. IC Role / Device Role / Timing Role: High-speed digitizer interfacing directly to CCD output amplifiers with programmable gain and offset correction. Use Value: No missing codes and ±0.35 LSB DNL ensure faithful grayscale reproduction; 150 mW power enables fanless handheld enclosures.
Digital Video Acquisition	Portable Instrumentation
Use Scenario: Capturing baseband composite or component video signals in field-deployable test equipment and broadcast monitors. IC Role / Device Role / Timing Role: Dual ADC converting Y/C or R/G/B channels with matched gain (0.03% channel-to-channel) and aperture delay (8.5 ps). Use Value: Crosstalk <−90 dB prevents color bleeding; parallel 20-bit output supports real-time HDMI/SDI encoder interfaces.	Use Scenario: Signal acquisition in handheld oscilloscopes, spectrum analyzers, and RF field strength meters operating on rechargeable batteries. IC Role / Device Role / Timing Role: Low-power, high-fidelity ADC enabling >4-hour runtime with 20 MSPS sampling and on-demand standby activation. Use Value: <1 mW power-down mode extends shelf life; 1.5–3.6 V VDR compatibility allows direct connection to 1.8 V FPGA I/O banks.

Ultrasound Imaging

CCD Imaging Systems

Use Scenario: Digitizing analog I/Q echo return signals from phased-array transducers at 20 MSPS for beamforming and Doppler processing.

IC Role / Device Role / Timing Role: Dual-channel ADC capturing synchronized in-phase and quadrature components with <10 ps aperture jitter to preserve phase coherence.

Use Value: 9.5 ENOB at 20 MHz enables accurate tissue characterization; low-latency 2.5-cycle I-data path supports real-time scan-line rendering.

Use Scenario: Converting pixel charge outputs from linear or area CCD sensors in portable document scanners and industrial inspection cameras.

IC Role / Device Role / Timing Role: High-speed digitizer interfacing directly to CCD output amplifiers with programmable gain and offset correction.

Use Value: No missing codes and ±0.35 LSB DNL ensure faithful grayscale reproduction; 150 mW power enables fanless handheld enclosures.

Digital Video Acquisition

Portable Instrumentation

Use Scenario: Capturing baseband composite or component video signals in field-deployable test equipment and broadcast monitors.

IC Role / Device Role / Timing Role: Dual ADC converting Y/C or R/G/B channels with matched gain (0.03% channel-to-channel) and aperture delay (8.5 ps).

Use Value: Crosstalk <−90 dB prevents color bleeding; parallel 20-bit output supports real-time HDMI/SDI encoder interfaces.

Use Scenario: Signal acquisition in handheld oscilloscopes, spectrum analyzers, and RF field strength meters operating on rechargeable batteries.

IC Role / Device Role / Timing Role: Low-power, high-fidelity ADC enabling >4-hour runtime with 20 MSPS sampling and on-demand standby activation.

Use Value: <1 mW power-down mode extends shelf life; 1.5–3.6 V VDR compatibility allows direct connection to 1.8 V FPGA I/O banks.

Equivalent & Alternatives

The following parts are listed as comparable options for similar dual-channel, 10-bit, 20+ MSPS ADC applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
ADS1000IRUGR	Single-channel, 12-bit, 128 kSPS SAR ADC; no internal reference or offset correction; 0.3 mW typical power.	Targeted at low-speed sensor monitoring, not high-speed I/Q sampling.	Not suitable for ADC10D020CIVS replacement due to 3 orders-of-magnitude lower speed and lack of dual-channel architecture.
AD9215BCPZ-20	Single-channel, 10-bit, 20 MSPS pipeline ADC; 65 mW power; no multiplexed output mode or integrated VCMO.	Requires external common-mode biasing and separate clock/data routing for I/Q pairs.	Valid alternative only when dual-channel integration is not required and board layout can accommodate two discrete converters.

Compared with ADS1000IRUGR and AD9215BCPZ-20, the ADC10D020CIVS uniquely integrates dual synchronized ADCs, on-chip VCMO generation, multiplexed/parallel bus flexibility, and hardware offset correction - reducing BOM count and layout complexity in portable I/Q signal chains.

Availability

ADC10D020CIVS is available at Aetrix Electronics and suitable for ultrasound imaging systems, portable instrumentation, and digital video acquisition requiring stable component supply, long-term lifecycle support, and industrial temperature-grade performance.

Supply support for ADC10D020CIVS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data conversion technologies.

The ADC10D020CIVS belongs to TI's precision high-speed ADC product line, designed specifically for portable, low-power, dual-channel I/Q digitization in medical, test & measurement, and communications equipment.

FAQ

What is the guaranteed operating temperature range for the ADC10D020CIVS?

The ADC10D020CIVS is specified for continuous operation from −40°C to +85°C ambient temperature. This industrial-grade rating is validated across all key parameters including ENOB, DNL, and power consumption, making it suitable for deployment in harsh environments such as portable medical devices and field instrumentation where thermal stability is critical. The ADC10D020CIVS maintains no missing codes across this full range.

Does the ADC10D020CIVS require an external reference voltage?

No - the ADC10D020CIVS supports internal reference capability via its VREF pin, which accepts an externally applied 0.8 V to 1.5 V reference voltage. This reference sets the full-scale input range (1 VP-P or 2 VP-P depending on GAIN pin state) and must be bypassed with a minimum 1 µF capacitor. The device does not include an internal voltage reference generator; VREF must be supplied externally for accurate conversion.

How does the ADC10D020CIVS handle power management during idle periods?

The ADC10D020CIVS provides two low-power states: Standby mode (27 mW, 800 ns wake-up) activated by asserting STBY high, and Power Down mode (<1 mW, <1 ms wake-up) activated by asserting PD high. In Power Down mode, the ADC10D020CIVS retains register settings but halts conversion; recovery is fully specified and deterministic. These modes are essential for extending battery life in portable instrumentation.

Can the ADC10D020CIVS interface directly with 1.8 V FPGA I/O banks?

Yes - the ADC10D020CIVS uses dedicated VDR pins (6 and 30) that accept 1.5 V to 3.6 V supplies, allowing direct connection to 1.8 V FPGA I/O banks without level shifters. Digital outputs (I0–I9, Q0–Q9) are LVCMOS-compatible and driven from VDR; proper bypassing (10–50 µF + 0.1 µF) is required on each VDR pin to maintain signal integrity and minimize ground bounce.

What is the purpose of the VCMO pin on the ADC10D020CIVS?

The VCMO pin on the ADC10D020CIVS provides a buffered 1.5 V common-mode output (±0.15 V, 1 mA source capability) used to bias the differential analog inputs (I+/I−, Q+/Q−). It eliminates the need for external resistive dividers or op-amp buffers, simplifying front-end design. VCMO must be bypassed with a 1 µF low-ESR capacitor in parallel with a 0.1 µF capacitor to ensure stable common-mode voltage under dynamic load conditions.

ADC10D020CIVS Specifications

Product attributes: Attribute value

Manufacturer:: Texas Instruments

Series:: -

Package/Case:: 48-TQFP

Packaging:: Tray

Product Status:: Obsolete

Number of Bits:: 10

Sampling Rate (Per Second):: 20M

Number of Inputs:: 2

Input Type:: Differential, Single Ended

Data Interface:: Parallel

Configuration:: S/H-ADC

Ratio - S/H:ADC:: 1:1

Number of A/D Converters:: 1

Architecture:: Two-Step

Reference Type:: External, Internal

Voltage - Supply, Analog:: 2.7V ~ 3.6V

Voltage - Supply, Digital:: 2.7V ~ 3.6V

Features:: Simultaneous Sampling

Operating Temperature:: -40°C ~ 85°C

Supplier Device Package:: 48-TQFP (7x7)

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

ADC10D020CIVS FAQ

1.How can I place an order for ADC10D020CIVS through Aetrix?

Please submit a Request for Quotation (RFQ) for ADC10D020CIVS on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADC10D020CIVS reliable?

The price and inventory of ADC10D020CIVS are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADC10D020CIVS is usually 5 days.

3.What payment methods are accepted for ADC10D020CIVS?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADC10D020CIVS transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADC10D020CIVS?

ADC10D020CIVS orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADC10D020CIVS order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADC10D020CIVS?

For technical support, including ADC10D020CIVS datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADC10D020CIVS requirements.

6.How does Aetrix verify that ADC10D020CIVS is sourced from the original manufacturer or authorized distributors?

All ADC10D020CIVS products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADC10D020CIVS meets industry standards.

7.What is the process for return or replacement of ADC10D020CIVS?

All ADC10D020CIVS units undergo pre-shipment inspection (PSI). If there is an issue with ADC10D020CIVS, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADC10D020CIVS part is unused and in its original packaging.

Return procedure for ADC10D020CIVS:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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