Texas Instruments ADC1173CIJM

Overview

ADC1173CIJM from Texas Instruments is an 8-bit, 15 MSPS analog-to-digital converter operating from a single +3V supply and consuming 33 mW typical power. It features internal sample-and-hold, straight binary output coding, and industry-standard pinout. Designed for video digitization, CCD imaging, and portable digital video equipment where low power and DC/AC accuracy are critical.

For engineers reviewing the ADC1173CIJM datasheet, ADC1173CIJM pinout, ADC1173CIJM application, or ADC1173CIJM equivalent, key selection considerations include its 7.6 ENOB at 3.58 MHz, ±0.85 LSB DNL max, differential phase error of 0.5°, and 24-pin TSSOP package with separate analog/digital supply and ground pins.

Technical Context

The ADC1173CIJM uses a unique pipeline architecture achieving 7.6 effective bits at 3.58 MHz input frequency, with 2.5 clock-cycle latency and aperture jitter of 30 ps rms. Sampling occurs on the falling edge of CLK, and conversion range is defined by externally set VRT (1.0–AVDD) and VRB (0–2.0 V) reference inputs.

It integrates internal reference bias resistors (RRT = 360 Ω, RRB = 90 Ω), supports self-biasing via VRTS/VRBS pins, and provides short-circuit-proof CMOS/TTL-compatible outputs enabled by OE. Analog input bandwidth is 120 MHz, and input capacitance varies dynamically (4 pF CLK low / 11 pF CLK high).

Key Specifications

Pinout & Package

ADC1173CIJM is housed in a 24-pin TSSOP (PW package), thermally enhanced for stable operation in compact video modules. Pin layout follows industry-standard configuration for 8-bit parallel-output ADCs, with dedicated AVDD/DVDD and AVSS/DVSS pins enabling clean analog/digital separation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 8-bit, 15 MSPS ADC applications.

Compared with ADS7822U and MAX1186EEE+, ADC1173CIJM uniquely balances 15 MSPS throughput, video-optimized AC specs (0.5° DP, 1.5% DG), and programmable reference range - making it irreplaceable in legacy NTSC/PAL digitization and portable imaging where timing and linearity are co-constrained.

Availability

ADC1173CIJM is available at Aetrix Electronics and suitable for video digitization, digital still cameras, camcorders, CCD imaging, and electro-optics applications requiring stable component supply and long-lifecycle support.

Supply support for ADC1173CIJM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, automotive, and communications markets.

The ADC1173CIJM belongs to TI's legacy high-speed precision ADC product line, engineered specifically for cost-sensitive, low-power video and imaging systems operating from single 3-V supplies.

FAQ

What is the operating temperature range for ADC1173CIJM?

The ADC1173CIJM is specified for commercial operation from −40°C to +75°C. All key AC parameters-including ENOB (7.6 bits typ), THD (−54 dB typ), and differential phase (0.5° max)-are ensured across this full range per the SNAS025F datasheet. No derating is required for thermal performance within these limits.

Does ADC1173CIJM require external reference components?

No-ADC1173CIJM includes internal reference bias resistors and supports self-biasing via VRTS and VRBS pins to generate ~1.56 V (VRT) and ~0.36 V (VRB) at 3.0 V supply. External references are optional and used only when tighter voltage tolerance or trimming is needed; the device does not require external resistors for basic operation.

Can ADC1173CIJM interface directly with 5-V logic systems?

ADC1173CIJM outputs are CMOS/TTL compatible but rated for DVDD = 2.7–3.6 V. Direct connection to 5-V logic risks overvoltage damage. To interface safely, use level-shifting buffers (e.g., SN74LVC245) or configure DVDD pin 11 at reduced voltage (≤DVDD pin 13) per datasheet guidance-never exceed 0.5 V difference between pins 11 and 13.

What is the pipeline latency of ADC1173CIJM, and how does it affect system timing?

ADC1173CIJM has a fixed pipeline delay of 2.5 clock cycles plus output delay (tOD = 24–28 ns). For a 15 MHz clock, this results in ~197 ns total latency from sampling edge to valid D0–D7 output. System firmware must account for this fixed offset when synchronizing captured data with frame timing or downstream processing stages.

How is power consumption reduced when ADC1173CIJM is idle?

Power consumption drops from 33 mW (active) to ~1.1 mW by halting the CLK signal in the low state-reducing digital supply current from 2.3 mA to ~100 µA. This technique is validated in the datasheet; stopping CLK in the high state is not recommended, and two initial clock cycles must precede halting to prevent excess reference ladder current.