STMicroelectronics ADC120IPT

Overview

ADC120IPT from STMicroelectronics is a low-power, 8-channel, 12-bit successive-approximation register (SAR) analog-to-digital converter with SPI-compatible serial output, 50 ksps–1 Msps conversion rate, and operation from 2.7 V to 3.6 V supply. It integrates an internal track-and-hold, supports single-ended inputs, and delivers 72 dB SINAD at 40.2 kHz input for precision telemetry and shunt-based current sensing.

For engineers reviewing the ADC120IPT datasheet, ADC120IPT pinout, ADC120IPT application, or ADC120IPT equivalent, this device is selected for high-channel-count, low-power industrial data acquisition where SPI interface, wide temperature range (−40 °C to +125 °C), and guaranteed no missing codes are critical design requirements.

Technical Context

The ADC120IPT implements a pure CMOS SAR architecture with integrated track-and-hold, enabling precise sampling of up to eight single-ended analog inputs via an on-chip 8-to-1 multiplexer. Channel selection is controlled by three address bits (ADD2–ADD0) in the SPI command frame.

It operates with fully independent analog (AVCC/AGND) and digital (DVCC/DGND) power domains, supports 16 MHz SCLK, and enters ultra-low-power shutdown mode (<5 µA) when /CS is high-enabling dynamic power management in battery-sensitive systems.

Key Specifications

Pinout & Package

TSSOP-16 plastic package with exposed pad (ECOPACK® compliant); 4.4 mm × 5.0 mm footprint, 1.0 mm max height, 0.65 mm pitch.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit, multi-channel SAR ADC applications.

Compared with ADS7953IRHBT and MCP3208-CI/P, the ADC120IPT uniquely combines extended temperature operation, integrated track-and-hold, guaranteed no missing codes, and sub-7 mW power at full 1 Msps-making it optimal for ruggedized, high-fidelity, multi-channel acquisition where thermal and timing margins are tight.

Availability

ADC120IPT is available at Aetrix Electronics and suitable for motor control systems, industrial telemetry nodes, and automotive battery monitoring requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for ADC120IPT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

STMicroelectronics is a global semiconductor leader headquartered in Geneva, Switzerland, designing and manufacturing microcontrollers, power management ICs, sensors, and analog/mixed-signal products for industrial, automotive, and consumer markets.

The ADC120 belongs to ST's precision analog data acquisition portfolio, engineered specifically for high-channel-density, low-power, extended-temperature industrial and automotive sensing applications where reliability and deterministic performance are non-negotiable.

FAQ

What is the minimum SCLK duty cycle required for reliable operation?

The ADC120IPT specifies a 40% to 60% SCLK duty cycle. Operation outside this range may cause timing violations in acquisition or conversion phases, leading to incorrect samples or increased DNL. At 16 MHz, the minimum high/low time is 25 ns each-designers must ensure clock generator jitter remains below ±5 ns to maintain margin.

How does the ADC120IPT handle unselected analog input channels during conversion?

Unselected channels are disconnected from the internal multiplexer and exhibit high-impedance isolation (>100 MΩ). The 84 dB channel-to-channel isolation specification confirms that leakage from active to inactive channels is suppressed to <0.0004% of full-scale signal-critical when measuring small differential signals amid large common-mode transients.

Can the ADC120IPT operate with AVCC = 3.3 V and DVCC = 2.7 V simultaneously?

Yes-AVCC and DVCC may differ by up to ±0.15 V per datasheet Table 5. With AVCC = 3.3 V, DVCC may range from 3.15 V to 3.45 V. Operating DVCC at 2.7 V violates the DVCC min spec (AVCC − 0.15 V), risking logic-level incompatibility and potential latch-up; both supplies must stay within their coupled tolerance window.

Is the DOUT pin 5 V tolerant when interfaced with a 5 V microcontroller SPI bus?

No-the DOUT pin is not 5 V tolerant. Its VOH is specified at 2.8 V (I_source = 1 mA) with AVCC/DVCC = 3.3 V, and absolute maximum input voltage on any pin is AVCC + 0.3 V = 3.6 V. Direct connection to 5 V logic requires level-shifting; failure to do so risks permanent damage per absolute maximum ratings.