Texas Instruments ADC122S101CIMM/NOPB
- Part No.:
- ADC122S101CIMM/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
ADC122S101CIMM/NOPB.pdf
- Description:
- IC ADC 12BIT SAR 8VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,577
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADC122S101CIMM/NOPB from Texas Instruments is a 12-bit, dual-channel successive-approximation ADC with serial SPI-compatible interface, operating at 500 ksps to 1 Msps sample rates, 72.4 dB typical SNR, and single-supply 2.7V–5.25V operation - used for precision analog monitoring in portable instrumentation and remote data acquisition systems.
For engineers reviewing the ADC122S101CIMM/NOPB datasheet, ADC122S101CIMM/NOPB pinout, ADC122S101CIMM/NOPB application, or ADC122S101CIMM/NOPB equivalent, key selection criteria include guaranteed no missing codes, channel-to-channel crosstalk of −86 dB, power-down current of 0.14 µW (3V), and full specification across its entire 500 ksps–1 Msps sample rate range - not just at a single rate.
Technical Context
The ADC122S101CIMM/NOPB implements a charge-redistribution SAR architecture with integrated track-and-hold, supporting two analog inputs (IN1/IN2) via internal multiplexer. Conversion timing is tightly synchronized to SCLK, requiring 13 SCLK cycles per conversion and 16 SCLK cycles total throughput time.
Its serial interface uses CS as frame initiator and DOUT/DIN for MSB-first 12-bit data transfer with control register loading on rising SCLK edges. The device operates without power-up delay or dummy conversions, delivering first valid result from IN1 immediately after power-on reset.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with guaranteed no missing codes - ensures monotonicity and full code coverage over temperature and supply range. |
| Sample Rate Range | 500 ksps to 1 Msps - fully specified performance across entire range, eliminating need for derating at high throughput. |
| INL / DNL | ±0.64 LSB / +0.9/−0.6 LSB (typ) - enables accurate multi-channel measurement without calibration in industrial sensor interfaces. |
| SNR | 72.4 dB (typ) at fIN = 40.3 kHz - supports >11.7 ENOB for high-fidelity signal capture in portable test equipment. |
| Power Consumption | 4.3 mW (3V) / 13.1 mW (5V) active; 0.14 µW (3V) shutdown - enables battery-powered operation with rapid wake/sleep cycling. |
| Analog Input Range | 0 V to VA - ratiometric operation simplifies design when using same supply for sensors and reference. |
| Channel Crosstalk | −86 dB (5V) - allows simultaneous sampling of independent signals (e.g., voltage/current) with minimal interference. |
Pinout & Package
ADC122S101CIMM/NOPB is housed in an 8-lead VSSOP (DGK) package, 3.0 mm × 3.0 mm × 1.0 mm body, with exposed thermal pad (not electrically connected). Pin 1 is CS; pin 3 is GND; pin 2 is VA; pin 8 is SCLK - all pins are surface-mount compatible with standard reflow profiles.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS (Pin 1) | Chip Select input | Falling edge initiates conversion frame; high state forces power-down and tri-states DOUT. |
| VA (Pin 2) | Analog supply | +2.7V to +5.25V single supply; also serves as reference - requires local 1 µF + 0.1 µF bypassing. |
| GND (Pin 3) | Analog ground | Common return for analog and digital sections; must be low-impedance connection to minimize noise coupling. |
| IN1 (Pin 4) | Analog input channel 1 | 0 V to VA input range; sampled during track mode; default channel on power-up. |
| IN2 (Pin 5) | Analog input channel 2 | 0 V to VA input range; selected via ADD[2:0] bits in control register; matched offset error ±0.1 LSB. |
| DIN (Pin 6) | Serial data input | Loads 8-bit control register on rising SCLK edges; defines next channel (IN1/IN2) before conversion begins. |
| DOUT (Pin 7) | Serial data output | 12-bit straight-binary result clocked out MSB-first on falling SCLK edges; tri-stated when CS is high. |
| SCLK (Pin 8) | Serial clock input | 50 kHz–16 MHz clock; controls conversion timing, data transfer, and internal logic state transitions. |
Key Features
| Feature | Design Value |
|---|---|
| Full-rate specification | Guaranteed INL, DNL, SNR, and THD across 500 ksps–1 Msps - eliminates interpolation uncertainty in variable-speed systems. |
| Low-power shutdown | 0.14 µW (3V) quiescent power - enables microamp-level system sleep modes without external power gating. |
| Ratiometric architecture | Input range and LSB scale with VA - removes need for separate precision reference in cost-sensitive designs. |
| Integrated track-and-hold | 33 pF input capacitance in track mode; 3 pF in hold mode - reduces external anti-aliasing filter complexity for DC–8 MHz signals. |
| Multi-standard serial interface | SPI™, QSPI™, and MICROWIRE™ compatibility - interoperable with common microcontrollers and DSPs without protocol translation. |
Applications
| Portable Data Loggers | Industrial Sensor Nodes |
|---|---|
Use Scenario: Battery-powered environmental monitors logging temperature, humidity, and pressure over weeks on coin-cell power. IC Role / Device Role: Dual-channel front-end digitizer acquiring sensor outputs sequentially with automatic channel switching. Use Value: 0.14 µW shutdown current extends battery life; ratiometric operation eliminates reference drift errors across temperature. |
Use Scenario: DIN-rail mounted condition monitoring unit measuring motor voltage and current simultaneously for predictive maintenance. IC Role / Device Role: Precision analog acquisition engine capturing synchronized voltage/current waveforms at 1 Msps. Use Value: −86 dB channel crosstalk prevents current-sense contamination of voltage measurements; 72.4 dB SNR preserves dynamic range for fault signature detection. |
| Remote Telemetry Systems | Lab-Grade Handheld Meters |
Use Scenario: Solar-powered field node transmitting soil moisture and solar irradiance data via LoRaWAN every 15 minutes. IC Role / Device Role: Low-duty-cycle ADC activated only during measurement bursts, then returned to ultra-low-power state. Use Value: No power-up delay or dummy conversions enable immediate sampling upon wake; 4.3 mW active power minimizes energy per reading. |
Use Scenario: Benchtop multimeter requiring 12-bit resolution, dual-input capability, and stable readings under varying line conditions. IC Role / Device Role: Core digitizer providing calibrated voltage and current readings with channel-to-channel matching. Use Value: ±0.1 LSB channel offset match and ±0.64 LSB INL ensure consistent accuracy between inputs without per-channel calibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel 12-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADC122S051 | Same 12-bit resolution and pinout, but rated for 200–500 ksps - lower max sample rate and reduced SNR (70.6 dB min). | Best suited for lower-throughput sensor fusion where 500 ksps is sufficient and power is less constrained. | Select ADC122S051 only if system does not require ≥500 ksps sustained throughput or >72 dB SNR. |
| ADC122S021 | Same family, 12-bit, pin-compatible, but specified for 50–200 ksps - higher DNL (±1.2 LSB max) and lower full-power bandwidth (5 MHz). | Targeted at slow-scan applications like thermostats or basic data loggers with infrequent sampling. | Choose ADC122S021 only when sample rate ≤200 ksps is acceptable and cost is prioritized over dynamic performance. |
Compared with ADC122S051 and ADC122S021, the ADC122S101CIMM/NOPB delivers the highest sample rate (1 Msps), best SNR (72.4 dB typ), lowest DNL (−0.6 LSB min), and widest full-power bandwidth (11 MHz at 5.25V) - making it the sole option in this family qualified for demanding real-time waveform capture.
Availability
ADC122S101CIMM/NOPB is available at Aetrix Electronics and suitable for portable instrumentation, remote telemetry, and industrial sensor nodes requiring stable component supply, long-term lifecycle support, and guaranteed no-missing-codes performance across −40°C to +85°C.
Supply support for ADC122S101CIMM/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in precision data converters and industrial-grade ICs.
The ADC122S101CIMM/NOPB belongs to TI's precision SAR ADC portfolio designed for space-constrained, low-power applications requiring dual-channel acquisition, robust serial interfacing, and guaranteed monotonicity - targeting portable, remote, and distributed sensing systems.
FAQ
What is the absolute maximum analog input voltage for ADC122S101CIMM/NOPB?
The absolute maximum analog input voltage for ADC122S101CIMM/NOPB is VA + 0.3 V, with VA ranging from +2.7 V to +5.25 V. Exceeding this limit risks ESD damage to the input protection diodes. Per datasheet Absolute Maximum Ratings, input voltage must stay within −0.3 V to VA + 0.3 V relative to GND. Operation beyond 0 V to VA degrades linearity and may cause code errors.
Does ADC122S101CIMM/NOPB require an external reference voltage?
No, ADC122S101CIMM/NOPB does not require an external reference voltage. It uses its VA supply pin as both power source and reference - resulting in a ratiometric transfer function where LSB = VA / 4096. This eliminates reference drift errors but requires clean, well-bypassed VA supply to maintain SNR and INL performance.
How many SCLK cycles are needed to complete one conversion and read out data for ADC122S101CIMM/NOPB?
ADC122S101CIMM/NOPB requires exactly 16 SCLK cycles per conversion frame: the first 3 cycles are for track mode acquisition, followed by 13 cycles for hold, conversion, and serial output. Data appears on DOUT starting at the 5th SCLK falling edge, MSB first, completing the 12-bit word by the 16th cycle.
Can ADC122S101CIMM/NOPB perform simultaneous sampling of IN1 and IN2?
No, ADC122S101CIMM/NOPB cannot perform true simultaneous sampling. It uses a single SAR core with internal multiplexer, so IN1 and IN2 are sampled sequentially - first one channel, then the other - with typical channel-to-channel crosstalk of −86 dB. For synchronized dual-channel capture, external sample-and-hold circuits are required.
What is the minimum SCLK frequency supported by ADC122S101CIMM/NOPB?
The minimum SCLK frequency for ADC122S101CIMM/NOPB is 50 kHz, as specified in Operating Ratings. While the device remains functional below this, AC electrical characteristics (e.g., tSU, tH, tACC) are only ensured between 50 kHz and 16 MHz. At very low clock frequencies, throughput drops but DC accuracy remains unaffected.
ADC122S101CIMM/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 1M
- Number of Inputs:
- 2
- Input Type:
- Single Ended
- Data Interface:
- SPI, DSP
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- Supply
- Voltage - Supply, Analog:
- 2.7V ~ 5.25V
- Voltage - Supply, Digital:
- 2.7V ~ 5.25V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 8-VSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADC122S101CIMM/NOPB FAQ
1.How can I place an order for ADC122S101CIMM/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for ADC122S101CIMM/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADC122S101CIMM/NOPB reliable?
The price and inventory of ADC122S101CIMM/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADC122S101CIMM/NOPB is usually 5 days.
3.What payment methods are accepted for ADC122S101CIMM/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADC122S101CIMM/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADC122S101CIMM/NOPB?
ADC122S101CIMM/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADC122S101CIMM/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADC122S101CIMM/NOPB?
For technical support, including ADC122S101CIMM/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADC122S101CIMM/NOPB requirements.
6.How does Aetrix verify that ADC122S101CIMM/NOPB is sourced from the original manufacturer or authorized distributors?
All ADC122S101CIMM/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADC122S101CIMM/NOPB meets industry standards.
7.What is the process for return or replacement of ADC122S101CIMM/NOPB?
All ADC122S101CIMM/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with ADC122S101CIMM/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADC122S101CIMM/NOPB part is unused and in its original packaging.
Return procedure for ADC122S101CIMM/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADC122S101CIMM/NOPB Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
