Texas Instruments ADC122S625CIMMX/NOPB
- Part No.:
- ADC122S625CIMMX/NOPB
- Manufacturer:
- Texas Instruments
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
ADC122S625CIMMX/NOPB.pdf
- Description:
- IC ADC 12BIT SAR 10VSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,454
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADC122S625CIMMX/NOPB from Texas Instruments is a dual 12-bit simultaneous-sampling SAR ADC with true differential inputs per channel, 50–200 kSPS conversion rate, ±1 LSB INL (max), and SPI/QSPI/MICROWIRE-compatible serial interface - used in motor control systems to preserve phase coherence between current and voltage sensing channels.
For engineers reviewing the ADC122S625CIMMX/NOPB datasheet, ADC122S625CIMMX/NOPB pinout, ADC122S625CIMMX/NOPB application, or ADC122S625CIMMX/NOPB equivalent, key selection criteria include simultaneous sampling integrity, differential input common-mode range (−VREF to +VREF), 71 dBc SNR (min), 2.6 µW power-down consumption, and VSSOP-10 package compatibility with space-constrained industrial sensor interfaces.
Technical Context
The ADC122S625CIMMX/NOPB implements two independent successive-approximation register (SAR) cores sharing one external reference and serial interface, enabling true simultaneous sampling with matched acquisition timing and <0.02 LSB INL/DNL matching between channels. Its internal track-and-hold maintains differential signal integrity from input pins through conversion.
It operates with a single 4.5–5.5 V analog supply (VA), accepts an external reference from 1.0 V to VA, and delivers binary 2's complement output via a single DOUT line - with 4 leading zeros separating Channel A's 12-bit result from Channel B's 12-bit result on falling SCLK edges.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit with no missing codes - guarantees monotonicity and full code coverage for precision measurement. |
| Sample Rate | 50–200 kSPS - supports real-time closed-loop motor control at ≤200 kHz update rates without aliasing. |
| INL / DNL | ±1 LSB (max) / ±0.95 LSB (max) - ensures accurate amplitude fidelity across full-scale input range. |
| SNR / THD | 71 dBc (min) / −72 dBc (min) - enables high-fidelity digitization of low-distortion sinusoidal waveforms. |
| Power @ 200 kSPS | 8.6 mW (typ) - allows integration into thermally constrained embedded systems without active cooling. |
| Power-Down Mode | 2.6 µW (typ) - facilitates ultra-low-power sleep states in battery-backed or energy-harvested monitoring nodes. |
| Input Range | Differential: −VREF to +VREF - supports flexible scaling (e.g., ±2.5 V with 2.5 V reference) while rejecting common-mode noise. |
| Operating Temp | −40°C to +105°C - qualified for under-hood automotive, industrial drives, and outdoor metering environments. |
Pinout & Package
ADC122S625CIMMX/NOPB is housed in a 10-lead Very Small Outline Package (VSSOP) with 0.5 mm lead pitch, optimized for high-density PCB layouts and thermal performance (θJA = 240°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VREF | Reference voltage input | Defines full-scale differential input range; must be decoupled with ≥0.1 µF ceramic capacitor to ensure stable conversion accuracy. |
| CHA+, CHA− | Differential input pair for Channel A | Accepts true differential analog signals; preserves phase relationship with Channel B during simultaneous sampling. |
| CHB+, CHB− | Differential input pair for Channel B | Electrically isolated but time-aligned sampling path; enables synchronized acquisition of dual sensor signals. |
| GND | Analog ground reference | Common return for all analog signals and reference; must be routed separately from digital ground to minimize noise coupling. |
| VA | Analog power supply | 4.5–5.5 V supply powering SAR core and track-and-hold; requires local 0.1 µF + bulk (1–10 µF) decoupling. |
| DOUT | Serial data output | Single-line, MSB-first, binary 2's complement output containing interleaved Channel A and B results with 4-zero guard band. |
| SCLK | Serial clock input | Controls data transfer timing; conversion completes in 32 SCLK cycles; min/max frequency: 1.6–6.4 MHz. |
| CS | Chip select (active low) | Initiates conversion on falling edge; holds device in power-down mode when high; enables continuous conversion when held low. |
Key Features
| Feature | Design Value |
|---|---|
| True simultaneous sampling | Preserves sub-degree phase alignment between Channel A and B - critical for vector-controlled motor drives and multi-axis position feedback. |
| External reference flexibility | VREF adjustable from 1.0 V to VA enables dynamic range optimization (e.g., 1.25 V for low-voltage sensors or 5 V for full-rail operation). |
| Wide common-mode input range | Supports differential inputs with common-mode voltage up to VA/2 - simplifies front-end design for isolated current shunt amplifiers. |
| SPI/QSPI/MICROWIRE compatibility | Eliminates need for protocol translation logic; interoperable with TI C2000™, STM32, and NXP Kinetis microcontrollers' hardware SPI peripherals. |
| Low power at full speed | 8.6 mW at 200 kSPS enables continuous high-speed acquisition in thermally limited enclosures without derating. |
| Channel-to-channel isolation | −90 dBc at <1 MHz prevents crosstalk-induced measurement error in tightly coupled analog signal chains (e.g., phase-current sensing). |
Applications
| Motor Control | Power Monitoring |
|---|---|
|
Use Scenario: Real-time acquisition of phase current and bus voltage in three-phase inverter drives. IC Role / Device Role / Timing Role: Dual simultaneous-sampling ADC capturing synchronized current/voltage snapshots for field-oriented control (FOC) algorithms. Use Value: Maintains <10 ns inter-channel skew to enable accurate torque estimation and reduce current ripple in servo systems. |
Use Scenario: High-accuracy energy metering in industrial power analyzers with harmonic analysis capability. IC Role / Device Role / Timing Role: Simultaneous digitization of voltage and current waveforms for true RMS, power factor, and THD calculation. Use Value: 71 dBc SNR and −72 dBc THD support Class 0.2 metering compliance per IEC 62053-22. |
| Multi-Axis Positioning | Medical Sensor Interface |
|
Use Scenario: Coordinated sampling of encoder quadrature signals and load cell outputs in CNC motion controllers. IC Role / Device Role / Timing Role: Dual-channel acquisition preserving temporal correlation between position and force feedback for adaptive control loops. Use Value: ±0.02 LSB INL matching ensures sub-micron positional repeatability across axes without calibration drift. |
Use Scenario: Direct interface to differential bridge-based pressure and flow sensors in portable diagnostic equipment. IC Role / Device Role / Timing Role: Low-noise, low-power ADC converting biopotential and transducer outputs with minimal external components. Use Value: 2.6 µW power-down mode extends battery life in handheld ultrasound or ECG devices during standby intervals. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel simultaneous-sampling ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADS8325IDRCT | 16-bit resolution, 100 kSPS max, SPI-only interface, no power-down mode | Better DC accuracy for precision instrumentation; lower sample rate limits use in high-bandwidth motor control | Select when absolute linearity (±0.5 LSB INL) outweighs simultaneous sampling speed and ultra-low power requirements. |
| AD7321BRUZ | 12-bit, ±10 V/±5 V/±2.5 V/0–10 V software-selectable input ranges, parallel + serial interface | Flexible unipolar/bipolar support simplifies mixed-signal system design; larger TSSOP-20 package increases board area | Choose when multi-range analog input flexibility and parallel readout are needed over compact VSSOP-10 footprint and lowest power. |
Compared with ADS8325IDRCT and AD7321BRUZ, ADC122S625CIMMX/NOPB uniquely balances 200 kSPS simultaneous sampling, 2.6 µW power-down, and VSSOP-10 size - making it optimal for space- and power-constrained real-time control where phase coherence matters more than 16-bit resolution or multi-range configurability.
Availability
ADC122S625CIMMX/NOPB is available at Aetrix Electronics and suitable for motor control, power monitoring, and multi-axis positioning systems requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant packaging.
Supply support for ADC122S625CIMMX/NOPB includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and connectivity technologies, with decades of expertise in precision data converters and industrial-grade ICs.
The ADC122S625CIMMX/NOPB belongs to TI's high-performance SAR ADC product line, engineered specifically for real-time industrial control applications demanding synchronized dual-channel acquisition, low power, and robust operation across extended temperature ranges.
FAQ
What is the maximum sample rate supported by the ADC122S625CIMMX/NOPB?
The ADC122S625CIMMX/NOPB supports a maximum sample rate of 200 kSPS per channel with true simultaneous sampling. This rate is achieved using a 6.4 MHz SCLK and requires CS to be held low continuously. At this rate, total power consumption is 8.6 mW (typ) with VA = 5 V and VREF = 2.5 V. The minimum sample rate is 50 kSPS.
Does the ADC122S625CIMMX/NOPB support single-ended input configurations?
Yes, the ADC122S625CIMMX/NOPB supports single-ended operation: tie CHA− or CHB− to a stable bias voltage (e.g., VREF/2), and drive CHA+ or CHB+ with the signal. Performance remains strong - only minor SNR degradation versus differential mode - and full dynamic range is preserved when VREF ≤ VA/2. The datasheet provides verified application circuits for this configuration.
How does the ADC122S625CIMMX/NOPB handle channel-to-channel timing skew?
The ADC122S625CIMMX/NOPB achieves true simultaneous sampling via shared clocking and matched internal track-and-hold paths, resulting in <1 ns inter-channel aperture jitter and guaranteed zero skew in acquisition timing. This is confirmed by its −90 dBc channel-to-channel isolation and <0.02 LSB INL matching - critical for vector control and phase-sensitive measurements where timing coherence directly impacts system accuracy.
What reference voltage range is valid for the ADC122S625CIMMX/NOPB?
The ADC122S625CIMMX/NOPB accepts an external reference voltage (VREF) from 1.0 V to VA (4.5–5.5 V). Operation below 1.0 V is possible but degrades SNR and increases effective LSB size relative to noise floor. For optimal performance, TI recommends VREF = 2.5 V with VA = 5 V - yielding a ±2.5 V differential input range and 1.22 mV/LSB step size.
Is the ADC122S625CIMMX/NOPB pin-compatible with other members of the ADC122S family?
No - the ADC122S625CIMMX/NOPB is not pin-compatible with ADC122S021 or ADC122S051. It uses a unique 10-pin VSSOP layout with dedicated CHA+/CHA−/CHB+/CHB− inputs and shared SCLK/CS/DOUT. Pin assignments differ across the family due to distinct channel count, sampling architecture (simultaneous vs. pseudo-simultaneous), and interface options. Always verify pin mapping against SNAS451A before board reuse.
ADC122S625CIMMX/NOPB Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 200k
- Number of Inputs:
- 2
- Input Type:
- Differential, Single Ended
- Data Interface:
- SPI, DSP
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 105°C
- Supplier Device Package:
- 10-VSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
ADC122S625CIMMX/NOPB FAQ
1.How can I place an order for ADC122S625CIMMX/NOPB through Aetrix?
Please submit a Request for Quotation (RFQ) for ADC122S625CIMMX/NOPB on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADC122S625CIMMX/NOPB reliable?
The price and inventory of ADC122S625CIMMX/NOPB are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADC122S625CIMMX/NOPB is usually 5 days.
3.What payment methods are accepted for ADC122S625CIMMX/NOPB?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADC122S625CIMMX/NOPB transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADC122S625CIMMX/NOPB?
ADC122S625CIMMX/NOPB orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADC122S625CIMMX/NOPB order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADC122S625CIMMX/NOPB?
For technical support, including ADC122S625CIMMX/NOPB datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADC122S625CIMMX/NOPB requirements.
6.How does Aetrix verify that ADC122S625CIMMX/NOPB is sourced from the original manufacturer or authorized distributors?
All ADC122S625CIMMX/NOPB products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADC122S625CIMMX/NOPB meets industry standards.
7.What is the process for return or replacement of ADC122S625CIMMX/NOPB?
All ADC122S625CIMMX/NOPB units undergo pre-shipment inspection (PSI). If there is an issue with ADC122S625CIMMX/NOPB, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADC122S625CIMMX/NOPB part is unused and in its original packaging.
Return procedure for ADC122S625CIMMX/NOPB:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADC122S625CIMMX/NOPB Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
