Texas Instruments ADC3582IRSBT

Overview

ADC3582IRSBT from Texas Instruments is an 18-bit, 25 MSPS ultra-low-power analog-to-digital converter optimized for high-precision, low-noise data acquisition. It delivers –155.9 dBFS/Hz noise spectral density, ±7/±0.7 LSB (typ) INL/DNL, and 84.9 dBFS SNR at 1.1 MHz input - enabling accurate digitization in demanding industrial and instrumentation signal chains.

For engineers reviewing the ADC3582IRSBT datasheet, ADC3582IRSBT pinout, ADC3582IRSBT application, or ADC3582IRSBT equivalent, this page provides verified specifications, validated SLVDS interface timing, confirmed 40-pin WQFN (5×5 mm) package mapping, and two production-ready alternative parts with documented functional and performance differences.

Technical Context

The ADC3582IRSBT implements a single-channel, pipelined SAR architecture with on-chip digital decimation filters supporting real/complex decimation by 2, 4, 8, 16, or 32 and a 32-bit NCO. Its serial LVDS (SLVDS) output supports 1-wire (1-cycle latency) and 2-wire modes, with configurable DCLK/FCLK timing aligned to sampling clock edges.

It operates across –40°C to +105°C using dual 1.8 V supplies (AVDD, IOVDD), accepts differential analog inputs up to 900 MHz bandwidth, and supports both external 1.6 V reference and internal reference with buffered REFBUF input. Power scales from 85 mW at 25 MSPS to 126 mW under full-load 1-wire operation.

Key Specifications

Pinout & Package

ADC3582IRSBT is housed in a 40-pin WQFN package (5.00 mm × 5.00 mm) with exposed thermal pad. Pin functions are fully defined per TI SBAS873A Rev A (October 2022), including dedicated SLVDS lanes (DA0P/M, DA1P/M), frame/bit clocks (FCLKP/M, DCLKP/M), and dual-domain supply pins (AVDD, IOVDD, GND, IOGND).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-resolution, low-power ADC applications.

Compared with ADC3582IRSBT, ADC3562IRSBT trades 2-bit resolution and filtering capability for lower cost and power, while ADS41B49IRGZT sacrifices noise performance and integration to achieve 10× higher throughput - making ADC3582IRSBT optimal for precision, power-constrained, mixed-signal instrumentation.

Availability

ADC3582IRSBT is available at Aetrix Electronics and suitable for high-speed data acquisition, power quality monitoring, and source measurement unit (SMU) applications requiring stable component supply across extended temperature and long product lifecycles.

Supply support for ADC3582IRSBT includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor leader specializing in analog, embedded processing, and high-performance data converters for industrial, automotive, and communications markets.

The ADC358x family - including ADC3582IRSBT - was designed for ultra-low-noise, ultra-low-power digitization in precision test and measurement, control systems, and spectrum analysis where thermal and power constraints limit traditional high-speed ADC use.

FAQ

What is the maximum analog input frequency supported by ADC3582IRSBT?

The ADC3582IRSBT supports an analog input bandwidth of 900 MHz (–3 dB), enabling direct sampling of RF signals up to L-band frequencies. This specification is measured differentially with –1 dBFS input and applies across the full industrial temperature range (–40°C to +105°C), making ADC3582IRSBT suitable for spectrum analyzer front-ends and software-defined radio receivers without intermediate frequency filtering.

Does ADC3582IRSBT support both external and internal voltage references?

Yes, ADC3582IRSBT supports either an external 1.6 V reference applied to the VREF pin or an internal reference enabled via configuration. The REFBUF pin allows connection of a 1.2 V external reference to drive the internal buffer, providing flexibility in system-level reference architecture. Gain error drift is 0.6 ppm/°C with external reference, versus 85 ppm/°C with internal reference - confirming ADC3582IRSBT's suitability for stable metrology-grade designs when external referencing is used.

What is the latency of ADC3582IRSBT in 1-wire SLVDS mode?

In 1-wire SLVDS mode, ADC3582IRSBT achieves a fixed latency of exactly 1 ADC clock cycle from analog input sampling to valid digital output. This value is guaranteed across temperature and supply variations and is independent of decimation settings. For a 25 MSPS sampling rate, this corresponds to 40 ns - enabling ADC3582IRSBT to serve real-time control loops in motor drives or adaptive RF systems where deterministic timing is critical.

Which package does ADC3582IRSBT use, and what are its thermal characteristics?

ADC3582IRSBT uses a 40-pin WQFN package (RSB variant) measuring 5.00 mm × 5.00 mm with an exposed thermal pad. Its thermal metrics include R_ΘJA = 30.7°C/W and R_ΘJB = 10.5°C/W, validated per JEDEC JESD51 standards. These values confirm ADC3582IRSBT can sustain continuous 25 MSPS operation at full load in ambient temperatures up to +105°C without heatsinking - meeting requirements for sealed industrial controllers and portable test equipment.

Can ADC3582IRSBT perform on-chip decimation, and what ratios are supported?

Yes, ADC3582IRSBT integrates a configurable digital filter supporting real or complex decimation by integer factors of 2, 4, 8, 16, or 32. Complex decimation enables IQ data generation for SDR applications, while real decimation reduces output data rate for baseband processing. All modes operate with deterministic latency (21–23 output clock cycles added to base 1-cycle ADC latency), and the 32-bit NCO allows precise frequency translation - eliminating external FPGA logic in many spectrum analysis and communication receiver designs featuring ADC3582IRSBT.