Texas Instruments ADC3644EVM

Overview

ADC3644EVM from Texas Instruments is a dedicated evaluation module for the ADC3644 - a 14-bit, dual-channel, 125 MSPS high-speed analog-to-digital converter with serial LVCMOS output interface and integrated decimation filter. It supports AC-coupled single-ended or differential analog inputs via onboard balun, external sampling clock input (125 MHz), and DCLKIN (437.5 MHz in DDC-bypass mode). The EVM enables dynamic range validation and spectral performance testing in RF-sampling systems.

For engineers reviewing the ADC3644EVM datasheet, ADC3644EVM pinout, ADC3644EVM application, or ADC3644EVM equivalent, this page delivers verified hardware setup requirements, FPGA capture integration with TSWDC155EVM, USB-C/FMC-based configuration, and real-world test conditions including 125 MHz clocking, 5.135 MHz analog tone, and 437.5 MHz DCLK for ADC3644-specific operation.

Technical Context

The ADC3644EVM implements a fixed-hardware platform optimized for evaluating the ADC3644's oversampling + decimation capability, supporting both full-rate and decimated data paths. Its analog front-end includes transformer-coupled inputs (CHAp/J7, CHBp/J9) with selectable single-ended/differential modes, while clocking uses SMA-terminated CLKp (J5) and DCLKIN (J6) inputs with precise frequency alignment requirements.

Configuration is handled via USB-C (J3) or FMC connector, enabling control of ADC registers, FPGA firmware loading, and real-time FFT capture through TI's ADC36xxEVM GUI and HSDC Pro software. Power is supplied externally at 12 V, regulated onboard, with jumpers (J12, J13) and switches (SW1–SW5) defining operational state for reference, power-down, and communication routing.

Key Specifications

Availability

ADC3644EVM is available at Aetrix Electronics and suitable for software-defined radio prototyping, communications infrastructure validation, spectrum analyzer development, and medical signal acquisition requiring stable component supply and traceable evaluation hardware.

Supply support for ADC3644EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Texas Instruments is a global semiconductor company headquartered in Dallas, Texas, specializing in analog, embedded processing, and high-speed data conversion technologies.

The ADC3644EVM belongs to TI's ADC36xx Evaluation Module family, designed specifically to accelerate evaluation of ultra-low-noise, low-power, high-speed dual-channel ADCs targeting RF-sampling architectures in communications and instrumentation.

FAQ

What is the ADC3644EVM used for?

The ADC3644EVM is a Texas Instruments evaluation module used exclusively to characterize the ADC3644 - a 14-bit, 125 MSPS dual-channel analog-to-digital converter. It enables engineers to validate SNR, SFDR, and ENOB under real-world conditions using its balun-coupled analog inputs, precise clocking interfaces, and integrated FPGA capture path via TSWDC155EVM. The ADC3644EVM supports both full-rate and decimated output modes, making it essential for RF-sampling system design verification before silicon integration.

Which ADC does the ADC3644EVM evaluate?

ADC3644EVM evaluates only the ADC3644 device: a 14-bit, dual-channel, 125 MSPS high-speed ADC with serial LVCMOS output, internal decimation filter, and ultra-low noise architecture. It is not compatible with ADC3660 or ADC3643 for functional evaluation - each variant (ADC3660EVM, ADC3644EVM, ADC3643EVM) has distinct clocking, DCLK, and configuration requirements validated in TI's SBAU232A user's guide.

How is the ADC3644EVM powered and configured?

The ADC3644EVM is powered by an external 12 V DC supply connected to its barrel jack, with onboard regulation distributing clean power to analog and digital sections. Configuration is performed via USB-C (J3) using TI's ADC36xxEVM GUI, or through the FMC connector when interfaced with the TSWDC155EVM. Critical settings - including VREF control (SW5 ON), PDN/SYNC jumper (J12 unpopulated), and DCLKIN source (SW3 = SMA) - must be manually verified per TI's hardware setup instructions before operation.

What external equipment is required to operate the ADC3644EVM?

To operate the ADC3644EVM, you require: (1) TSWDC155EVM data capture board, (2) three low-phase-noise signal generators (for analog input, sampling clock, and DCLKIN), (3) two bandpass filters (≥60 dB harmonic attenuation, ≤5 dB insertion loss), (4) 12 V/1 A power supply, and (5) a Windows 10/11 PC with TI's ADC36xxEVM GUI, HSDC Pro, and Vivado Lab Solutions installed. All signal generators must share a common 10 MHz reference for coherent measurement.

Does the ADC3644EVM support differential analog input?

Yes, the ADC3644EVM supports both single-ended and differential analog input configurations via its onboard balun network. Analog signals can be applied to CHAp (J7) and CHBp (J9) in single-ended mode by default, or routed differentially using external baluns or transformer-coupled sources. The EVM's analog input stage preserves signal integrity up to 125 MSPS and is optimized for low-noise, high-SFDR measurements as specified in the ADC3644 datasheet - a key capability confirmed in TI's ADC3644EVM setup procedure and hardware description.