Texas Instruments ADC3663EVM
- Part No.:
- ADC3663EVM
- Manufacturer:
- Texas Instruments
- Package:
- Datasheet:
-
ADC3663EVM.pdf
- Description:
- ADC3663 DUAL-CHANNEL, 16-BIT, 65
- Quantity:
- Payment:

- Shipping:

Inventory:2,482
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADC3663EVM from Texas Instruments is an evaluation module designed to characterize the ADC3663 - a dual-channel, 16-bit, 65 MSPS high-speed analog-to-digital converter with LVDS serial output and internal decimation filtering. It supports AC-coupled single-ended or differential analog inputs via onboard balun, external sampling clock input (65 MHz), and DCLKIN (260 MHz) for data capture synchronization. The EVM enables dynamic range and SNR validation in RF-sampling signal chain prototyping.
For engineers reviewing the ADC3663EVM datasheet, ADC3663EVM pinout, ADC3663EVM application, or ADC3663EVM equivalent, this page delivers verified hardware setup requirements, FPGA interface details with TSWDC155EVM, LVDS timing constraints, GUI configuration steps for ADC3663-specific modes, and real-world test conditions including 65 MHz clock + 5.135 MHz analog tone + 260 MHz DCLK alignment.
Technical Context
The ADC3663EVM interfaces directly with the TSWDC155EVM FPGA capture board via FMC connector, enabling real-time LVDS data streaming at 2-wire, 16-bit, DDC-bypass mode. It relies on external low-phase-noise signal generators locked to a common 10 MHz reference for CLK, analog input, and DCLKIN signals to ensure coherent sampling and accurate FFT-based performance analysis.
Power is supplied via 12 V DC jack with onboard regulation; configuration is performed over USB-C using the ADC36xxEVM LVDS GUI, which programs both the ADC3663 device registers and FPGA firmware. Default analog input routing uses CHAp (J7) and CHBp (J9) SMA connectors with integrated baluns for single-ended-to-differential conversion.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Evaluated Device | ADC3663: dual-channel, 16-bit, 65 MSPS SAR ADC with LVDS output |
| Analog Input Interface | AC-coupled SMA connectors (CHAp/J7, CHBp/J9) with onboard balun for SE-to-diff conversion |
| Sampling Clock Input | SMA connector (J5), supports 65 MHz external clock with ±10 ppm stability requirement |
| DCLK Input | SMA connector (J6), requires 260 MHz LVDS clock for 16-bit, 2-wire, DDC-bypass operation |
| Power Supply | 12 V DC input via barrel jack; onboard regulators supply all ADC, FPGA, and bias voltages |
| FPGA Interface | FMC-LPC connector (J1) for direct connection to TSWDC155EVM data capture board |
| Configuration Interface | USB-C (J3) for GUI-based ADC register programming and FPGA firmware loading |
Availability
ADC3663EVM is available at Aetrix Electronics and suitable for software-defined radio development, spectrum analyzer prototyping, and medical imaging signal chain evaluation requiring stable component supply, full documentation access, and TI-validated reference design files.
Supply support for ADC3663EVM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Texas Instruments is a global semiconductor company specializing in analog, embedded processing, and high-speed data converter technologies, with decades of leadership in precision ADC architecture and evaluation platform design.
The ADC3663EVM belongs to TI's ADC36xx Evaluation Module family, engineered specifically to accelerate characterization of ultra-low-power, high-resolution, high-speed ADCs used in wideband RF receivers and portable instrumentation systems.
FAQ
What is the primary function of the ADC3663EVM?
The ADC3663EVM is an evaluation module built to assess the performance of the ADC3663 - a dual-channel, 16-bit, 65 MSPS analog-to-digital converter. It provides complete hardware and software infrastructure for measuring key metrics like SNR, SFDR, and ENOB under real-world conditions, including LVDS data capture, clock synchronization, and configurable analog input paths. The ADC3663EVM itself contains no active conversion circuitry but serves as a validated interface platform for the ADC3663 IC.
Which ADC devices does the ADC3663EVM support beyond the ADC3663?
In addition to the ADC3663, the ADC3663EVM supports evaluation of five other members of the same family: ADC3662 (2-channel, 16-bit, 25 MSPS), ADC3661 (2-channel, 16-bit, 10 MSPS), ADC3563 (1-channel, 16-bit, 65 MSPS), ADC3562 (1-channel, 16-bit, 25 MSPS), and ADC3561 (1-channel, 16-bit, 10 MSPS). All share identical pinout, power, and interface requirements, allowing reuse of the same ADC3663EVM hardware across variants.
How is the ADC3663EVM powered and what are its voltage requirements?
The ADC3663EVM is powered exclusively through a 12 V DC input via the barrel jack (J10); no onboard battery or alternative supply options exist. Internal LDOs generate all required rail voltages for the ADC3663, FPGA interface logic, and balun bias networks. The 12 V supply must deliver ≥1 A continuous current, and TI specifies strict low-noise performance for optimal ADC dynamic range measurement - ripple must remain below 10 mVPP across 10 Hz–10 MHz.
What software tools are required to operate the ADC3663EVM?
Three software tools are mandatory: the ADC36xxEVM LVDS GUI (for device configuration and FPGA programming), Texas Instruments HSDC Pro (for FFT analysis and real-time data visualization), and AMD Vivado Lab Solutions (to compile and load FPGA bitstreams). All require Windows 10/11; Vivado Lab bin path must be added to the system PATH environment variable before launching the GUI. FX3 USB drivers are installed automatically during GUI setup.
Can the ADC3663EVM be used without the TSWDC155EVM data capture board?
No - the ADC3663EVM lacks onboard data capture or storage capability and cannot operate standalone. It requires connection to the TSWDC155EVM via the FMC-LPC connector (J1) to route LVDS data streams into an FPGA for buffering, formatting, and USB transmission to the host PC. The TSWDC155EVM provides the essential high-speed serial interface, memory buffer, and USB 3.0 bridge that the ADC3663EVM depends on for functional evaluation.
ADC3663EVM Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Texas Instruments
- Series:
- -
- Packaging:
- Box
- Product Status:
- Active
- Number of A/D Converters:
- 2
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 65M
- Data Interface:
- Serial LVDS
- Input Range:
- 3.2Vpp
- Power (Typ) @ Conditions:
- 94mW @ 65MSPS
- Utilized IC / Part:
- ADC3663
- Contents:
- Board(s), Cable(s)
ADC3663EVM FAQ
1.How can I place an order for ADC3663EVM through Aetrix?
Please submit a Request for Quotation (RFQ) for ADC3663EVM on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADC3663EVM reliable?
The price and inventory of ADC3663EVM are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADC3663EVM is usually 5 days.
3.What payment methods are accepted for ADC3663EVM?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADC3663EVM transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADC3663EVM?
ADC3663EVM orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADC3663EVM order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADC3663EVM?
For technical support, including ADC3663EVM datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADC3663EVM requirements.
6.How does Aetrix verify that ADC3663EVM is sourced from the original manufacturer or authorized distributors?
All ADC3663EVM products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADC3663EVM meets industry standards.
7.What is the process for return or replacement of ADC3663EVM?
All ADC3663EVM units undergo pre-shipment inspection (PSI). If there is an issue with ADC3663EVM, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADC3663EVM part is unused and in its original packaging.
Return procedure for ADC3663EVM:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADC3663EVM Tags

-
1083
Adafruit Industries LLC

-
1085
Adafruit Industries LLC

-
ADS7038Q1EVM-PDK
Texas Instruments

-
ADS8688EVM-PDK
Texas Instruments

-
EVAL-AD7606C18FMCZ
Analog Devices Inc.

-
ADS1232REF
Texas Instruments

-
EVAL-AD4134FMCZ
Analog Devices Inc.

-
EVAL-AD7768FMCZ
Analog Devices Inc.

-
ADC128S102EVM
Texas Instruments

-
ADS124S08EVM
Texas Instruments

-
ADC6140EVM-PDK
Texas Instruments

-
ADS7066EVM-PDK
Texas Instruments
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

