Analog Devices Inc. AD-DAC-FMC-ADP

Overview

AD-DAC-FMC-ADP from Analog Devices is an FMC LPC adapter board enabling DPG2-compatible high-speed DAC evaluation boards to interface with Xilinx FPGA evaluation platforms (e.g., ML605, SP605) via the VITA-57-compliant Low Pin Count FMC connector. It supports bidirectional LVDS data paths (TXI/TXQ), dual-phase-aligned clock distribution (CLK_TXI_O_P/N, CLK_TXQ_O_P/N), and DPG2-specific control signals including TRST_L, TCK, TMS, TDI, TDO, SCL, and SDA.

For engineers reviewing the AD-DAC-FMC-ADP datasheet, AD-DAC-FMC-ADP pinout, AD-DAC-FMC-ADP application, or AD-DAC-FMC-ADP equivalent, this adapter enables rapid integration of Analog Devices' DAC evaluation hardware into FPGA-based signal generation, RF prototyping, and high-speed data converter validation workflows - with attention to LVDS timing alignment, FMC LPC mechanical compatibility, and DPG2 protocol handshaking.

Technical Context

The AD-DAC-FMC-ADP implements a passive, layer-matched interconnect between DPG2 evaluation boards and Xilinx FMC host carriers. It routes 80+ differential LVDS signal pairs (including TXI_DATA_[0–15], TXQ_DATA_[0–15], and associated clocks) while preserving length matching critical for <100 ps skew across data/clock paths.

It conforms strictly to VITA-57.1 LPC mechanical specifications (72-pin I/O + 10-pin GND/Power), supports VADJ programmable I/O voltage (1.8 V to 3.3 V), and provides dedicated JTAG (TRST_L, TCK, TMS, TDI, TDO) and I²C (SCL, SDA) interfaces for host-side configuration and monitoring of attached DAC evaluation boards.

Key Specifications

Availability

AD-DAC-FMC-ADP is available at Aetrix Electronics and suitable for high-speed DAC evaluation, FPGA-based RF signal generation, and mixed-signal prototyping requiring stable component supply, traceable sourcing, and long-term design-in support.

Supply support for AD-DAC-FMC-ADP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD-DAC-FMC-ADP belongs to Analog Devices' DPG2 ecosystem - a hardware/software platform designed specifically to accelerate evaluation and firmware development for its portfolio of high-speed DACs, including the AD9122, AD9144, and AD9162 families.

FAQ

What is the primary function of the AD-DAC-FMC-ADP?

The AD-DAC-FMC-ADP is a passive adapter board that bridges Analog Devices' DPG2-compatible DAC evaluation boards to Xilinx FPGA evaluation platforms equipped with an FMC connector. It enables full signal, clock, JTAG, and I²C connectivity without modification to either the DAC board or host carrier. The AD-DAC-FMC-ADP ensures precise LVDS timing alignment and mechanical compliance with VITA-57.1 LPC specifications.

Which DAC evaluation boards are compatible with the AD-DAC-FMC-ADP?

The AD-DAC-FMC-ADP supports all DPG2-compatible DAC evaluation boards listed on analog.com/dpg, including those for the AD9122, AD9144, AD9162, and AD9172 families. Compatibility requires native DPG2 connector layout and LVDS-based data interface implementation. Boards must use the standard 100-pin DPG2 edge connector with defined TXI/TXQ signal mapping and DPG2 control pinout.

Does the AD-DAC-FMC-ADP require external power or configuration firmware?

No, the AD-DAC-FMC-ADP is a fully passive interconnect board with no active components, power regulation, or firmware. It draws only VADJ (1.8–3.3 V) and 12 V from the FMC host for signaling and auxiliary power. All configuration and control of attached DAC boards is handled by the host FPGA via JTAG and I²C lines routed through the AD-DAC-FMC-ADP.

Can the AD-DAC-FMC-ADP be used with HPC FMC hosts?

Yes - the AD-DAC-FMC-ADP uses the LPC variant of the FMC connector and is mechanically and electrically compatible with both LPC and HPC FMC hosts, including Xilinx ML605 and SP605. Its 72-pin I/O footprint fits within the LPC region of HPC connectors, and no host-side modifications are required to use the AD-DAC-FMC-ADP on HPC-capable carriers.

Where can I find the schematic, layout files, and UCF constraints for the AD-DAC-FMC-ADP?

The complete schematic, PCB layout (Gerber), and example UCF constraint files for ML605 and SP605 are included in the official AD-DAC-FMC-ADP Quick Start Guide published by Analog Devices. These documents are available for download from the product page for AD-DAC-FMC-ADP on analog.com, under the "Design Resources" section.