Analog Devices Inc. ADF4113BCPZ

Overview

ADF4113BCPZ from Analog Devices is a 4.0 GHz RF PLL frequency synthesizer IC used as a local oscillator in upconversion/downconversion stages of wireless transceivers. It features a dual-modulus prescaler (8/9, 16/17, 32/33, 64/65), programmable charge pump current up to 5 mA, 3-wire serial interface, and operates from 2.7 V to 5.5 V supply with separate VP rail for extended tuning voltage. It enables precise frequency synthesis in GSM, WCDMA, and wireless LAN base stations.

For engineers reviewing the ADF4113BCPZ datasheet, ADF4113BCPZ pinout, ADF4113BCPZ application, or ADF4113BCPZ equivalent, key selection criteria include its 4.0 GHz RF input capability, 1 kHz offset phase noise of −91 dBc/Hz at 900 MHz, programmable antibacklash pulse width, analog/digital lock detect, and support for industrial temperature range (−40°C to +85°C).

Technical Context

The ADF4113BCPZ implements a digital phase-frequency detector (PFD) with precision charge pump, 14-bit R counter, 6-bit A counter, and 13-bit B counter driving a dual-modulus prescaler (P/P+1) to realize N = BP + A division. Its architecture supports flexible reference input frequencies from 5 MHz to 104 MHz and RF input frequencies from 0.2 GHz to 4.0 GHz.

It uses a 24-bit input shift register with control bits C1/C2 to select among four internal latches (R, A/B, function, initialization). The MUXOUT pin provides selectable outputs including lock detect, scaled RF, or scaled reference - enabling real-time PLL status monitoring without external circuitry.

Key Specifications

Pinout & Package

The ADF4113BCPZ is housed in a 16-lead LFCSP (3 mm × 3 mm, 0.5 mm pitch) with exposed paddle connected to AGND. Pin 1 is LE; pin 19 is RSET; pin 20 is CP; pin 18 is VP; pin 17/16 are DVDD; pins 6/7 are AVDD; pins 9/10 are DGND; pins 2/3 are AGND; pin 5 is RFINA; pin 4 is RFINB; pin 8 is REFIN; pin 11 is CE; pins 12/13 are CLK/DATA; pin 14 is MUXOUT; pin 15 is CPGND.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar RF PLL synthesizer applications.

Compared with ADF4113BCPZ, ADF4351BCPZ integrates the VCO and eliminates external loop filter components but increases power and reduces flexibility in loop dynamics; LMS8001TR offers superior phase noise and wider design control over loop response but demands full external PLL implementation and higher engineering effort.

Availability

ADF4113BCPZ is available at Aetrix Electronics and suitable for wireless infrastructure, test equipment, and broadband communications applications requiring stable component supply, long-term lifecycle support, and guaranteed traceability.

Supply support for ADF4113BCPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and RF ICs, serving industrial, automotive, communications, and healthcare markets since 1965.

The ADF4113BCPZ belongs to the ADF411x family of integer-N PLL synthesizers designed specifically for wireless infrastructure LO generation, emphasizing low phase noise, robust lock detection, and flexible power supply architecture for multi-voltage RF systems.

FAQ

What is the maximum RF input frequency supported by the ADF4113BCPZ?

The ADF4113BCPZ supports an RF input frequency range of 0.2 GHz to 4.0 GHz at −5 dBm input level. Below 0.2 GHz, slew rate must exceed 130 V/µs to ensure reliable operation. This 4.0 GHz rating enables direct use with fundamental VCOs in LTE and 5G sub-6 GHz infrastructure designs without frequency doubling.

How does the separate VP supply pin improve VCO tuning range in the ADF4113BCPZ?

The VP pin on the ADF4113BCPZ allows the charge pump to operate at up to 6.0 V independently of the 2.7–5.5 V AVDD/DVDD rails. This extends the tuning voltage swing delivered to the VCO, supporting VCOs with >5 V tuning ranges - especially valuable in 3 V systems where AVDD alone would limit VCO linearity and frequency coverage.

Can the ADF4113BCPZ generate a 1960 MHz output with low phase noise?

Yes, the ADF4113BCPZ achieves −85 dBc/Hz phase noise at 1 kHz offset when generating 1960 MHz output with 200 kHz PFD frequency and 20 kHz loop bandwidth. This performance is verified per datasheet Figure 13 and supports stringent ACPR requirements in WCDMA and TD-LTE base stations.

What is the function of the MUXOUT pin on the ADF4113BCPZ?

The MUXOUT pin on the ADF4113BCPZ provides selectable outputs: lock detect signal, scaled RF frequency (÷2 or ÷4), or scaled reference frequency (÷R). This eliminates need for external monitoring circuitry and enables real-time PLL health verification in field-deployed wireless equipment using the ADF4113BCPZ.

Does the ADF4113BCPZ support both analog and digital lock detection?

Yes, the ADF4113BCPZ provides concurrent analog and digital lock detect outputs. The analog lock detect is available at the MUXOUT pin (when configured), while the digital lock detect is asserted on the dedicated LOCK DETECT pin. This dual-mode capability enhances system reliability in mission-critical wireless infrastructure where lock status must be validated through independent paths.