Analog Devices Inc. ADF4113BRU-REEL7

Overview

ADF4113BRU-REEL7 from Analog Devices is a 4.0 GHz RF PLL frequency synthesizer IC used as a local oscillator in wireless transceiver up/down-conversion stages. It features a dual-modulus prescaler (8/9, 16/17, 32/33, 64/65), programmable charge pump current (up to 5 mA), 3-wire serial interface, and operates from 2.7 V to 5.5 V supply with separate VP pin for extended tuning voltage - enabling precise frequency synthesis in GSM/WCDMA base station transmitters.

For engineers reviewing the ADF4113BRU-REEL7 datasheet, ADF4113BRU-REEL7 pinout, ADF4113BRU-REEL7 application, or ADF4113BRU-REEL7 equivalent, key selection criteria include its 4.0 GHz RF input capability, phase noise performance (−91 dBc/Hz @ 1 kHz offset, 900 MHz), lock detect functionality, and compatibility with external loop filters and VCOs in high-frequency wireless infrastructure designs.

Technical Context

The ADF4113BRU-REEL7 implements a digital phase-frequency detector (PFD), precision charge pump, 13-bit B counter, 6-bit A counter, 14-bit R counter, and dual-modulus prescaler (P/P+1) to realize an N-divider where N = BP + A. Its architecture supports flexible reference input frequencies (5–104 MHz) and enables wideband PLL design via programmable antibacklash pulse width and selectable prescaler ratios.

It integrates analog and digital lock detection, hardware/software power-down modes, and multiplexer output (MUXOUT) for monitoring lock status, scaled RF, or scaled reference signals. The separate VP supply (AVDD ≤ VP ≤ 6.0 V) decouples charge pump headroom from core logic voltage, allowing 6 V tuning range even in 3 V systems - critical for wide-tuning-range VCO integration.

Key Specifications

Pinout & Package

TSSOP-16 package with exposed paddle (EPAD) connected to AGND per datasheet Figure 3. Pin functions validated per Table 4 and functional block diagram.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar RF PLL synthesizer applications.

Compared with ADF4113BRU-REEL7, ADF4153BRUZ offers wider frequency range and integrated regulation but lacks 3-wire compatibility and MUXOUT diagnostics; HMC703LP4E provides monolithic PLL+VCO integration at higher power and cost, trading flexibility for reduced BOM count in fixed-frequency instruments.

Availability

ADF4113BRU-REEL7 is available at Aetrix Electronics and suitable for wireless infrastructure, communications test equipment, and industrial RF module designs requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for ADF4113BRU-REEL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and RF ICs, serving precision instrumentation, communications, and industrial markets since 1965.

The ADF411x family was designed specifically for high-frequency wireless infrastructure LO synthesis, emphasizing phase noise, spurious performance, and flexible prescaler architecture to meet 3GPP and IEEE 802.11 spectral masks.

FAQ

What is the maximum RF input frequency supported by the ADF4113BRU-REEL7?

The ADF4113BRU-REEL7 supports an RF input frequency range of 0.2 GHz to 4.0 GHz at −5 dBm input level, as specified in Table 1 under "RF CHARACTERISTICS (5 V)". This 4.0 GHz upper limit enables use in WCDMA Band I (1960 MHz), LTE Band 42 (3.5 GHz), and other sub-6 GHz wireless infrastructure applications. Operation below 0.2 GHz requires slew rate >130 V/µs to maintain proper prescaler function.

Does the ADF4113BRU-REEL7 require an external loop filter?

Yes, the ADF4113BRU-REEL7 requires an external passive or active loop filter connected between the CP pin and the VCO tuning input. The IC contains only the PFD, charge pump, and dividers; loop filter design determines bandwidth, stability, and transient response. Analog Devices provides recommended filter topologies and component values in Application Note AN-587 and the ADF4113 evaluation board (EV-ADF411XSD1Z) schematics.

How does the separate VP supply pin improve VCO tuning range in the ADF4113BRU-REEL7?

The VP pin on the ADF4113BRU-REEL7 allows the charge pump output stage to operate at up to 6.0 V independently of the 2.7–5.5 V AVDD/DVDD supplies. This enables generation of VCO tuning voltages up to ~5.5 V even in 3 V systems, extending usable VCO frequency range and improving linearity - especially critical for wide-tuning-range varactor-based VCOs in broadband wireless applications.

Can the ADF4113BRU-REEL7 generate a 1960 MHz output with low phase noise?

Yes, the ADF4113BRU-REEL7 achieves −85 dBc/Hz phase noise at 1 kHz offset for a 1960 MHz output (Table 1, footnote 13), measured with 200 kHz PFD frequency and 20 kHz loop bandwidth. This performance meets stringent ACPR requirements for WCDMA and LTE uplink transmission. Optimal results require proper PCB layout, low-noise 10 MHz REFIN, and matched loop filter design per EV-ADF411XSD1Z guidelines.

What is the purpose of the MUXOUT pin on the ADF4113BRU-REEL7?

The MUXOUT pin on the ADF4113BRU-REEL7 provides selectable access to three internal signals: digital lock detect, divided RF (÷8, ÷16, ÷32, or ÷64), or divided reference (÷R). Configured via the Function Latch bits M3–M1, it enables real-time system validation - e.g., verifying lock status without interrupting operation or monitoring reference integrity during calibration - reducing test complexity and debug time in production RF modules.