Analog Devices Inc. ADF4113HVBCPZ-RL7
- Part No.:
- ADF4113HVBCPZ-RL7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 20-WFQFN Exposed Pad, CSP
- Datasheet:
-
ADF4113HVBCPZ-RL7.pdf
- Description:
- IC CLK/FREQ SYNTH 20LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:4,631
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADF4113HVBCPZ-RL7 from Analog Devices is a high-voltage integer-N PLL frequency synthesizer with 15 V charge pump output, 200 MHz to 4.0 GHz RF input range, 2.7–5.5 V digital/analog supply, and dual selectable charge pump currents (80 µA / 640 µA). It directly drives high-tuning-voltage VCOs in wireless base station LO generation.
For engineers reviewing the ADF4113HVBCPZ-RL7 datasheet, ADF4113HVBCPZ-RL7 pinout, ADF4113HVBCPZ-RL7 application, or ADF4113HVBCPZ-RL7 equivalent, this device supports precise local oscillator synthesis for IF/RF up/downconversion, clocking of high-speed ADCs/DACs, and test equipment requiring low-phase-noise, high-voltage loop control.
Technical Context
The ADF4113HVBCPZ-RL7 integrates a low-noise phase frequency detector (PFD), precision 15 V charge pump, 14-bit R counter, 13-bit B/6-bit A counters, and dual-modulus prescaler (8/9, 16/17, 32/33, 64/65) to realize N = BP + A division. Its PFD includes programmable antibacklash pulse (7.2 ns fixed) to eliminate dead zone and minimize reference spurs.
It uses a 3-wire serial interface (CLK/DATA/LE) to configure latches for reference division, feedback division, and function control-including MUXOUT selection, lock detect mode, CP current setting, and power-down activation via CE pin or software bit PD1.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Charge Pump Voltage | 15 V max output-enables direct drive of high-Vtune VCOs without active loop filters |
| RF Input Frequency | 200 MHz to 4.0 GHz-supports cellular, microwave, and test equipment LO bands |
| Charge Pump Current | 80 µA or 640 µA selectable-adjusts loop filter bandwidth and phase noise trade-off |
| Reference Input Range | 5 MHz to 150 MHz-compatible with crystal oscillators, TCXOs, and frequency synthesizers |
| Phase Noise Floor | −212 dBc/Hz typ-low intrinsic noise enables high spectral purity in narrowband systems |
| Digital Lock Detect | Programmable precision (3 ns or 10 ns phase error threshold)-ensures reliable PLL lock verification |
| Operating Temp | −40°C to +85°C-qualified for industrial and base station environmental conditions |
Pinout & Package
LFCSP package (20-lead, 4 mm × 4 mm, exposed pad); RoHS-compliant, moisture-sensitive level 3. Exposed pad must be soldered to AGND for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| RSET | Charge pump current programming | Resistor to CPGND sets ICPmax = 3/RSET; 4.7 kΩ yields 640 µA |
| CP | Charge pump output | ±ICP sink/source node driving passive loop filter; rated for 15 V VP supply |
| CPGND | Charge pump ground return | Separate low-noise ground path for CP stage; must be isolated from DGND/AGND planes |
| RFINA/RFINB | Differential RF input | Accepts ac-coupled VCO signal up to 4 GHz; requires 100 pF bypass on RFINB |
| REFIN | Reference clock input | CMOS-compatible (0.4–AVDD Vp-p), 5–150 MHz; internal 100 kΩ termination |
| CE | Chip enable | Asynchronous hardware power-down-forces CP into three-state and disables all counters |
| CLK/DATA/LE | 3-wire serial interface | 24-bit shift register control; LE rising edge latches data to R/N/function latches |
| MUXOUT | Multiplexer output | Selectable internal signal: digital lock detect, analog lock detect, R/N divider output, or SDOUT |
| VP | Charge pump power supply | 13.5–16.5 V independent rail; decoupling critical for high-voltage stability |
| AVDD/DVDD | Analog/digital supply | 2.7–5.5 V shared rail; must be equal and decoupled separately per domain |
Key Features
| Feature | Design Value |
|---|---|
| High-voltage charge pump | 15 V output enables passive-loop filtering for VCOs requiring >10 V tuning voltage |
| Dual charge pump current | 80 µA / 640 µA selection optimizes loop bandwidth vs. phase noise for specific VCO Kvco |
| Digital lock detect | Configurable 3 ns or 10 ns phase-error threshold ensures robust lock validation in noisy environments |
| Pin compatibility | Drop-in replacement for ADF4110/4111/4112/4113/4106/4002-reduces redesign effort across PLL families |
| Antibacklash pulse | Fixed 7.2 ns pulse eliminates PFD dead zone, reducing reference spurs and in-band phase noise |
Applications
| Base Station Transceiver LO | Test Equipment Local Oscillator |
|---|---|
Use Scenario: Generating stable 1.8–3.5 GHz LO signals for upconversion in 4G/5G macrocell transceivers with high linearity requirements. IC Role / Device Role / Timing Role: Integer-N PLL synthesizer providing frequency-agile, low-spur LO with 15 V charge pump driving high-Kvco VCOs. Use Value: Eliminates active loop filter components, reduces board area by 30%, and maintains <−87 dBc integrated phase noise at 100 kHz offset. | Use Scenario: Programmable LO source in vector signal analyzers requiring fast frequency switching and sub-0.1 ppm accuracy. IC Role / Device Role / Timing Role: Reference-synchronized synthesizer generating clean LOs from 500 MHz to 4 GHz with digital lock confirmation. Use Value: Enables <1 µs frequency settling via software-controlled prescaler and counters, verified by digital lock detect output. |
| ADC/DAC Clock Generator | Point-to-Point Radio Transceiver |
Use Scenario: Low-jitter clock source for 14-bit, 250 MSPS ADCs in radar front-ends where aperture uncertainty must be <100 fs RMS. IC Role / Device Role / Timing Role: High-stability PLL synthesizer delivering low-phase-noise clock with 200 kHz loop bandwidth. Use Value: Achieves −152 dBc/Hz @ 1 MHz offset, reducing ADC SNR degradation by >3 dB compared to standard synthesizers. | Use Scenario: Dual-band LO generation (2.4 GHz and 5.8 GHz) in licensed point-to-point microwave links operating in harsh outdoor environments. IC Role / Device Role / Timing Role: Industrial-grade PLL synthesizer supporting −40°C to +85°C operation with robust lock detection. Use Value: Maintains lock under temperature cycling via programmable 3 ns lock threshold and 15 V CP headroom for aging VCO drift compensation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar PLL synthesizer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADF4113BCPZ-RL7 | Standard-voltage charge pump (5.5 V max); no 15 V VP rail support | Not suitable for VCOs requiring >6 V tuning voltage; requires active loop filter | Select only when driving low-Vtune VCOs and board space allows op-amp filter |
| ADF4153ABCPZ-RL7 | Fractional-N architecture; integrated ΣΔ modulator; lower reference spurs | Better for fine-resolution frequency steps (<1 Hz) but higher complexity and cost | Choose for applications needing sub-Hz resolution or wideband modulation capability |
Compared with ADF4113BCPZ-RL7, the ADF4113HVBCPZ-RL7 delivers 2.7× higher charge pump voltage for passive filtering, while ADF4153ABCPZ-RL7 adds fractional-N flexibility at the cost of increased design overhead and reduced maximum RF input frequency (2.5 GHz vs. 4.0 GHz).
Availability
ADF4113HVBCPZ-RL7 is available at Aetrix Electronics and suitable for wireless infrastructure, test instrumentation, and high-reliability communications equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for ADF4113HVBCPZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and RF ICs, serving industrial, communications, automotive, and aerospace markets with precision timing, signal processing, and power management solutions.
The ADF4113HV product line delivers high-voltage PLL synthesizers optimized for base station LO generation, high-frequency test equipment, and systems requiring direct passive-loop VCO drive without external amplification.
FAQ
What is the maximum RF input frequency supported by the ADF4113HVBCPZ-RL7?
The ADF4113HVBCPZ-RL7 supports an RF input frequency range of 200 MHz to 4.0 GHz. At 5 V supply, the upper limit is confirmed at 4.0 GHz with −5 dBm input level; below 5 MHz, slew rate must exceed 100 V/µs to ensure proper operation. This makes the ADF4113HVBCPZ-RL7 suitable for microwave and cellular band applications including LTE and 5G FR1.
How does the ADF4113HVBCPZ-RL7 achieve 15 V charge pump output with a 5.5 V supply?
The ADF4113HVBCPZ-RL7 uses an internal charge pump circuit powered by the dedicated VP pin (13.5–16.5 V), which is separate from the 2.7–5.5 V AVDD/DVDD rails. The CP pin outputs ±ICP current referenced to VP, enabling direct 15 V tuning voltage generation into passive loop filters-no external op-amp required. This architecture is explicitly designed into the ADF4113HVBCPZ-RL7 die.
Can the ADF4113HVBCPZ-RL7 replace the ADF4113BCPZ-RL7 without PCB changes?
No-ADF4113HVBCPZ-RL7 requires a 13.5–16.5 V VP supply rail and updated decoupling on VP, plus revised loop filter component ratings to handle 15 V. While pinout and logic interface are identical, the high-voltage domain necessitates layout review. The ADF4113HVBCPZ-RL7 is not a drop-in replacement unless the PCB accommodates the VP rail and HV-safe routing.
What are the two charge pump current options for the ADF4113HVBCPZ-RL7 and how are they selected?
The ADF4113HVBCPZ-RL7 offers 80 µA (low) and 640 µA (high) charge pump current settings, selected via CPI3/CPI2/CPI1 bits in the function latch (per Figure 22). With RSET = 4.7 kΩ, the high setting yields 640 µA; the low setting reduces ICP proportionally. This selection directly impacts loop bandwidth, phase margin, and in-band phase noise-critical for matching VCO gain (Kvco) and filter design.
Does the ADF4113HVBCPZ-RL7 support both analog and digital lock detect outputs?
Yes-the ADF4113HVBCPZ-RL7 provides both analog and digital lock detect via the MUXOUT pin, configured using M3/M2/M1 bits. Digital lock detect is active-high with programmable precision (3 ns or 10 ns phase error window); analog lock detect is open-drain N-channel output requiring a 10 kΩ pull-up, producing narrow pulses when locked. Both are accessible simultaneously only through time-multiplexed MUXOUT selection.
ADF4113HVBCPZ-RL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-WFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Clock/Frequency Synthesizer (RF)
- PLL:
- Yes
- Input:
- CMOS, TTL
- Output:
- Clock
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 2:1
- Differential - Input:Output:
- Yes/No
- Frequency - Max:
- 4GHz
- Divider/Multiplier:
- Yes/No
- Voltage - Supply:
- 2.7V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 20-LFCSP (4x4)
ADF4113HVBCPZ-RL7 FAQ
1.How can I place an order for ADF4113HVBCPZ-RL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADF4113HVBCPZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADF4113HVBCPZ-RL7 reliable?
The price and inventory of ADF4113HVBCPZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADF4113HVBCPZ-RL7 is usually 5 days.
3.What payment methods are accepted for ADF4113HVBCPZ-RL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADF4113HVBCPZ-RL7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADF4113HVBCPZ-RL7?
ADF4113HVBCPZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADF4113HVBCPZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADF4113HVBCPZ-RL7?
For technical support, including ADF4113HVBCPZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADF4113HVBCPZ-RL7 requirements.
6.How does Aetrix verify that ADF4113HVBCPZ-RL7 is sourced from the original manufacturer or authorized distributors?
All ADF4113HVBCPZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADF4113HVBCPZ-RL7 meets industry standards.
7.What is the process for return or replacement of ADF4113HVBCPZ-RL7?
All ADF4113HVBCPZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with ADF4113HVBCPZ-RL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADF4113HVBCPZ-RL7 part is unused and in its original packaging.
Return procedure for ADF4113HVBCPZ-RL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADF4113HVBCPZ-RL7 Tags
-
CD74HCT4046AM96
Texas Instruments

-
MC14046BDWR2G
onsemi

-
501MILFT
Renesas
-
CD74HC7046AM
Texas Instruments
-
CDCVF2505PWR
Texas Instruments

-
RC19004A100GNL#KB0
Renesas
-
SI5351A-B-GTR
Skyworks Solutions Inc.

-
CY2305SXI-1T
Infineon Technologies

-
570BILFT
Renesas

-
CDCE913PWR
Texas Instruments

-
CY2305SXI-1HT
Infineon Technologies

-
DS1086LU+T
Analog Devices Inc./Maxim Integrated
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

