Analog Devices Inc. ADF4117BRU

Overview

ADF4117BRU from Analog Devices is a 1.2 GHz RF PLL frequency synthesizer designed as a local oscillator (LO) in wireless transceivers. It features a 32/33 dual-modulus prescaler, 2.7 V to 5.5 V supply range, separate VP pin for extended tuning voltage up to 6 V, and digital lock detect - enabling precise frequency synthesis in GSM, WCDMA, and wireless LAN base stations.

For engineers reviewing the ADF4117BRU datasheet, ADF4117BRU pinout, ADF4117BRU application, or ADF4117BRU equivalent, this device supports fastlock mode, 3-wire serial interface programming, and operation across −40°C to +125°C (Y-grade), with confirmed phase noise of −87 dBc/Hz at 900 MHz (1 kHz offset, 200 kHz PFD).

Technical Context

The ADF4117BRU implements a complete integer-N PLL architecture using a low-noise phase frequency detector (PFD), precision charge pump, 14-bit R counter, 13-bit B counter, and 5-bit A counter. Its 32/33 dual-modulus prescaler enables N-divider synthesis up to 1.2 GHz RF input while maintaining CMOS counter compatibility at ≤200 MHz prescaler output frequency.

It supports programmable reference division (R = 1–16,383), configurable MUXOUT for lock detect or scaled clock outputs, and power-down mode with <1 μA sleep current. The separate VP supply allows independent tuning voltage headroom beyond DVDD/AVDD - critical for wide-range VCO control in 3 V systems.

Key Specifications

Pinout & Package

TSSOP-16 package (4.4 mm × 5.0 mm, 0.65 mm pitch), thermally enhanced with exposed pad (not electrically connected). Pin 1 marked by dot; pin 16 = VP; pins 4, 9 = AGND/DGND; pin 3 = CPGND - requires dedicated low-inductance ground return for charge pump stability.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar RF PLL synthesizer applications.

Compared with ADF4117BRU, the ADF4153A offers wider frequency coverage but sacrifices VP-based VCO headroom, while the LMX2531 delivers superior spectral purity at the cost of higher power and no hardware-accelerated lock. ADF4117BRU uniquely balances 1.2 GHz capability, Y-grade reliability, and VP-enabled tuning flexibility for cost-sensitive infrastructure designs.

Availability

ADF4117BRU is available at Aetrix Electronics and suitable for GSM base station transmitters, WCDMA femtocell LO generation, and wireless LAN 5 GHz band synthesizers requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for ADF4117BRU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and RF ICs, serving communications, industrial, and automotive markets with precision timing and signal processing solutions.

The ADF411x family was engineered specifically for wireless infrastructure LO synthesis - emphasizing robustness, low phase noise, and simplified loop filter design in temperature-varying environments.

FAQ

What is the maximum RF input frequency supported by the ADF4117BRU?

The ADF4117BRU supports an RF input frequency range of 0.1 GHz to 1.2 GHz, as specified in the Rev. D datasheet Table 1. This upper limit is validated for both B-grade (−40°C to +85°C) and Y-grade (−40°C to +125°C) versions, making it suitable for PCS, DCS, and WCDMA bands. Operation beyond 1.2 GHz is not characterized or guaranteed.

Does the ADF4117BRU require an external loop filter?

Yes, the ADF4117BRU requires an external passive loop filter between the CP (Pin 2) and the VCO tuning input. The charge pump output drives this filter to generate the analog control voltage; no internal filter is integrated. Design guidance for third-order filters is provided in Analog Devices' AN-587 application note and the ADF4117BRU evaluation board schematics.

How does the separate VP pin improve VCO tuning range in 3 V systems?

The VP pin on the ADF4117BRU accepts up to 6.0 V independently of AVDD/DVDD (2.7–5.5 V), allowing the charge pump to generate a 0–6 V tuning voltage even when the core logic runs at 3 V. This eliminates the need for external level-shifting or boost circuits - directly supporting wide-tuning VCOs like the HMC512LP5 in compact RF front-ends.

Can the ADF4117BRU operate with a 10 MHz reference input?

Yes, the ADF4117BRU fully supports a 10 MHz reference input on REFIN (Pin 8), as confirmed in Table 1 (REFIN frequency: 5–100 MHz) and multiple performance plots (Figures 6, 9–10). At 10 MHz, the R counter can be programmed for integer division (e.g., R = 50 → 200 kHz PFD), enabling optimal phase noise and spur performance.

What is the function of the FLO pin on the ADF4117BRU?

The FLO (Fast Lock Switch Output) pin on the ADF4117BRU is an open-drain CMOS output used to dynamically switch an external resistor in the loop filter path. When asserted during lock acquisition, it temporarily increases loop bandwidth - reducing lock time to ~200 μs - then disables to restore narrowband stability, as detailed in the "Fastlock Mode" section of the datasheet.