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Analog Devices Inc. ADF4360-7BCP

Part No.:
ADF4360-7BCP
Manufacturer:
Analog Devices Inc.
Category:
Clock Generators, PLLs, Frequency Synthesizers
Package:
24-WFQFN Exposed Pad, CSP
Datasheet:
AetrixADF4360-7BCP.pdf
Description:
IC SYNTHESIZER/VCO 24-LFCSP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,528

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Product details

Overview

ADF4360-7BCP from Analog Devices is an integrated integer-N PLL frequency synthesizer with on-chip VCO, designed for RF local oscillator generation in wireless transceivers. It delivers 350 MHz to 1800 MHz VCO output (or 175–900 MHz with ÷2), operates from 3.0 V to 3.6 V, supports 3-wire serial control, and features analog/digital lock detect - used in GSM/PCS/WCDMA handset LO synthesis.

For engineers reviewing the ADF4360-7BCP datasheet, ADF4360-7BCP pinout, ADF4360-7BCP application, or ADF4360-7BCP equivalent, key selection criteria include VCO tuning range (350–1800 MHz), programmable output power (−14 to −5 dBm), dual-modulus prescaler (8/9 or 16/17), phase noise performance (−116 dBc/Hz @ 100 kHz offset), and chip-scale package compatibility with RF layout constraints.

Technical Context

The ADF4360-7BCP implements an integer-N PLL architecture with a dual-modulus prescaler (8/9 or 16/17) enabling N = BP + A division, where B is a 13-bit counter and A is a 5-bit swallow counter. Its VCO core uses eight overlapping frequency bands automatically selected via band-select logic synchronized to the R counter clock.

Control is executed via a 24-bit serial interface with MSB-first loading and latch selection using two control bits (C2/C1). The charge pump current (ICP) is set by an external RSET resistor (nominal 4.7 kΩ → 2.5 mA), and loop filter design must accommodate VTUNE voltage range (1.25–2.5 V) and VCO sensitivity (12 MHz/V typical at 13 nH).

Key Specifications

Parameter Value and Actual Design Meaning
VCO Frequency Range350 MHz to 1800 MHz - sets fundamental LO coverage for UHF/SHF bands; ÷2 option extends low-end to 175 MHz.
Output Power Range−14 dBm to −5 dBm in 3 dB steps - selectable tail current (3.5–11 mA) enables trade-off between RF output level and power consumption.
Phase Noise @ 100 kHz−116 dBc/Hz typical - measured open-loop with L1/L2 = 13 nH; critical for adjacent-channel rejection in cellular receivers.
Charge Pump Current2.5 mA typical (RSET = 4.7 kΩ) - determines loop filter gain and impacts lock time (400 µs typical) and stability margin.
Reference Input Frequency10 MHz min / 250 MHz max - supports crystal oscillators or buffered clock sources; AC-coupled input requires ≥0.7 Vp-p.
Supply Voltage Range3.0 V to 3.6 V - AVDD, DVDD, and VVCO must be equal; 1.8 V logic-compatible I/O simplifies interfacing with low-voltage controllers.
Lock DetectAnalog (open-drain) and digital (CMOS) outputs - configurable via LDP bit; digital lock requires 3–5 consecutive <15 ns phase error cycles.

Pinout & Package

ADF4360-7BCP is housed in a 24-lead chip-scale package (CSP) with exposed thermal pad (EP), requiring soldering of EP to AGND for thermal and electrical integrity. Pin pitch is 0.5 mm; package dimensions are 4.0 mm × 4.0 mm × 0.8 mm (max).

Pin/Terminal Circuit Role Design Meaning
1 CPGNDCharge pump ground returnMust be low-inductance path to AGND; separates CP current return from digital/analog grounds to minimize noise coupling.
2 AVDDAnalog power supply3.0–3.6 V supply for prescaler/VCO; requires local 100 nF + 10 µF decoupling to AGND.
4 RFOUTA / 5 RFOUTBDifferential VCO RF outputsProgrammable −14 to −5 dBm; complementary outputs enable balanced filtering or single-ended use with 50 Ω termination.
6 VVCOVCO core power supplyIdentical to AVDD; powers VCO core; decoupling critical for phase noise and spurious suppression.
7 VTUNEVCO tuning voltage input0–2.5 V range; connects to loop filter output; sensitivity ~12 MHz/V dictates loop filter component values.
9 L1 / 10 L2External VCO inductor connectionsPaired 13 nH inductors (typical) set center frequency; parallel 470 Ω resistors required for L > 3.3 nH.
12 CC / 14 CNInternal compensation nodesCC: 10 nF to AGND; CN: 10 µF to VVCO - essential for stability and transient response of internal regulators.
13 RSETCharge pump current programming4.7 kΩ to CPGND sets ICP = 2.5 mA; tolerance directly affects loop gain and lock time.
16 REFINReference clock inputCMOS-compatible; 100 kΩ input resistance; accepts ac- or dc-coupled signals up to 250 MHz.
17 CLK / 18 DATA / 19 LE3-wire serial interface24-bit MSB-first load; LE rising edge transfers data to selected latch (control/R/N); timing requires t1 ≥ 20 ns setup.
23 CEChip enableActive-low hardware power-down; places charge pump in high-Z state and reduces supply current to 7 µA.
24 CPCharge pump output±ICP current source/sink; drives external loop filter; requires low-noise PCB routing away from RF traces.

Key Features

Feature Design Value
Integrated VCO with auto-band selectionEight overlapping VCO bands eliminate manual calibration; band switching completes in five PFD cycles without VTUNE disturbance.
Programmable dual-modulus prescalerSelectable 8/9 or 16/17 ratio enables optimal N-divider choice for contiguous frequency coverage and minimized reference spurs.
Divide-by-2 RF output optionConfigurable via DIV2 bit; halves VCO output frequency while preserving phase noise floor - ideal for sub-GHz IF generation.
Two lock detect modesDigital (CMOS) and analog (open-drain) outputs provide flexible system-level synchronization and fault monitoring.
Hardware/software power-downCE pin enables fast hardware shutdown; PD1/PD0 bits in control latch allow register-based sleep mode entry without pin toggling.

Applications

GSM/PCS Handset LO WCDMA Base Station Local Oscillator

Use Scenario: Generating stable 900 MHz or 1900 MHz local oscillator signals for transmit/receive paths in multi-band cellular handsets.

IC Role / Device Role / Timing Role: Integer-N synthesizer providing frequency-agile, low-phase-noise LO with fast lock time (<400 µs) for TDD/FDD channel switching.

Use Value: Integrated VCO eliminates external tank components; ÷2 mode supports dual-band operation from single VCO core; 1.8 V logic compatibility reduces host MCU interface complexity.

Use Scenario: Providing phase-coherent LO signals for multi-carrier WCDMA transceivers operating at 2.1 GHz (with ÷2) in macrocell base stations.

IC Role / Device Role / Timing Role: High-stability frequency synthesizer delivering −116 dBc/Hz phase noise at 100 kHz offset to meet ACLR requirements.

Use Value: Programmable output power (−14 to −5 dBm) allows optimization for mixer drive level vs. power consumption; analog lock detect enables real-time PLL health monitoring.

Wireless LAN Test Equipment CATV Upconverter LO

Use Scenario: Synthesizing precise, sweepable RF tones (350–1800 MHz) in benchtop signal generators and spectrum analyzer tracking sources.

IC Role / Device Role / Timing Role: Wideband integer-N PLL serving as agile frequency source with programmable reference division (R = 1–16383) for fine channel spacing.

Use Value: 3-wire serial interface enables microcontroller-based frequency programming; low 7 µA sleep current supports portable battery-powered instruments.

Use Scenario: Generating 550–870 MHz LO for cable TV upconverters converting baseband video/audio to RF channel bands.

IC Role / Device Role / Timing Role: Low-spurious synthesizer with −70 dBc reference spurs (typical) ensuring minimal in-band interference in shared-spectrum CATV plant.

Use Value: External inductor tuning (L1/L2) allows precise center-frequency alignment across production units; harmonic content (−19 dBc 2nd, −9 dBc 3rd) eases post-LO filtering.

Equivalent & Alternatives

The following parts are listed as comparable options for similar integer-N synthesizer with integrated VCO applications.

Alternative Part Technical Difference Application Difference Selection Advice
ADF4350BRUZWider frequency range (35 MHz–4.4 GHz), fractional-N capability, SPI interface, larger 32-lead TQFN package.Supports wider IF/RF bands and finer resolution (fractional mode); higher integration but greater layout complexity.Choose ADF4350BRUZ when sub-Hz frequency resolution or extended low-frequency coverage below 350 MHz is required.
LMX2531LQ1770ELower power (3.5 mA AIDD), integrated LDO, smaller 24-pin WQFN, but narrower VCO range (1.8–2.9 GHz) and no ÷2 output.Optimized for ultra-low-power handhelds; lacks ÷2 option and external inductor flexibility of ADF4360-7BCP.Choose LMX2531LQ1770E when board space and power budget are tighter, and 1.8–2.9 GHz coverage suffices without divide-by-2 need.

Compared with ADF4360-7BCP, ADF4350BRUZ offers broader bandwidth and fractional-N agility at the cost of higher current draw and larger footprint, while LMX2531LQ1770E trades VCO flexibility and ÷2 functionality for lower quiescent power and integrated regulation - making ADF4360-7BCP optimal for cost-sensitive, mid-band RF designs requiring external tuning control.

Availability

ADF4360-7BCP is available at Aetrix Electronics and suitable for wireless handset LO synthesis, test equipment signal generation, wireless LAN infrastructure, and CATV upconverter applications requiring stable component supply and consistent RF performance across temperature.

Supply support for ADF4360-7BCP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and RF ICs, headquartered in Norwood, MA, with deep expertise in precision signal processing and wireless infrastructure solutions.

The ADF4360 family targets cost-effective, integrated PLL+VCO solutions for consumer and industrial wireless applications - emphasizing simplicity, external component reduction, and robust RF performance in compact CSP packages.

FAQ

What is the recommended inductor value for ADF4360-7BCP to achieve 900 MHz VCO output?

The ADF4360-7BCP achieves 900 MHz VCO output with L1 and L2 = 13 nH (typical), per the "Choosing the Correct Inductance Value" section of the datasheet. For this configuration, VCO sensitivity is ~12 MHz/V, and output power is programmable from −14 dBm to −5 dBm. A 470 Ω resistor must be placed in parallel with each inductor to AGND when inductance exceeds 3.3 nH. Always verify tuning curve linearity and phase noise using the EV-ADF4360-7EB1Z evaluation board.

Does ADF4360-7BCP support fractional-N synthesis?

No, ADF4360-7BCP is strictly an integer-N synthesizer. Its N-divider consists of a 13-bit B counter and 5-bit A counter, forming N = BP + A with no fractional modulus capability. Channel spacing is therefore limited to fREFIN/R, where R is programmable from 1 to 16,383. For fractional-N operation, consider Analog Devices' ADF4350 or ADF4351, which integrate sigma-delta modulators.

How is the charge pump current (ICP) set on ADF4360-7BCP?

ICP is set by an external resistor (RSET) connected between Pin 13 (RSET) and CPGND (Pin 1). With RSET = 4.7 kΩ, nominal ICP is 2.5 mA (sink/source), calculated as ICP = 11.75 / RSET (kΩ). The RSET range is 2.7 kΩ to 10 kΩ, yielding ICP from ~1.17 mA to ~4.35 mA. This current directly scales loop filter gain and affects lock time, stability, and reference spur levels.

Can ADF4360-7BCP generate both RFOUTA and RFOUTB simultaneously?

Yes, ADF4360-7BCP drives RFOUTA and RFOUTB differentially from the same VCO core, and both outputs are active simultaneously. They are complementary (180° out-of-phase) and share identical programmable output power levels (−14 to −5 dBm). This enables balanced mixer drive or single-ended use with one output terminated in 50 Ω while the other feeds the RF path - no internal switching or disable function is provided.

What is the purpose of the MUXOUT pin on ADF4360-7BCP?

MUXOUT (Pin 20) is a multiplexed output that can be configured via M3/M2/M1 bits in the function latch to monitor internal signals: digital lock detect, analog lock detect, scaled RF output (÷2 or ÷4), or scaled reference frequency (÷R). This enables real-time PLL status verification, debug of lock behavior, or injection of a clean reference into auxiliary circuitry - all without requiring additional test points or probes.

ADF4360-7BCP Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
*
Package/Case:
24-WFQFN Exposed Pad, CSP
Packaging:
Bag
Product Status:
Obsolete
Programmable:
Not Verified
Type:
Fanout Distribution, Integer N Synthesizer (RF)
PLL:
Yes
Input:
CMOS
Output:
Clock
Number of Circuits:
-
Ratio - Input:Output:
1:2
Differential - Input:Output:
No/No
Frequency - Max:
1.8GHz
Divider/Multiplier:
Yes/No
Voltage - Supply:
3V ~ 3.6V
Operating Temperature:
-
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-
Supplier Device Package:
24-LFCSP (4x4)

ADF4360-7BCP FAQ

1.How can I place an order for ADF4360-7BCP through Aetrix?

Please submit a Request for Quotation (RFQ) for ADF4360-7BCP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for ADF4360-7BCP reliable?

The price and inventory of ADF4360-7BCP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADF4360-7BCP is usually 5 days.

3.What payment methods are accepted for ADF4360-7BCP?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADF4360-7BCP transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for ADF4360-7BCP?

ADF4360-7BCP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your ADF4360-7BCP order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for ADF4360-7BCP?

For technical support, including ADF4360-7BCP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADF4360-7BCP requirements.

6.How does Aetrix verify that ADF4360-7BCP is sourced from the original manufacturer or authorized distributors?

All ADF4360-7BCP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADF4360-7BCP meets industry standards.

7.What is the process for return or replacement of ADF4360-7BCP?

All ADF4360-7BCP units undergo pre-shipment inspection (PSI). If there is an issue with ADF4360-7BCP, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The ADF4360-7BCP part is unused and in its original packaging.

Return procedure for ADF4360-7BCP:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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