Analog Devices Inc. AD-FMCADC2-EBZ

Overview

AD-FMCADC2-EBZ from Analog Devices is a high-speed FMC-compatible data acquisition board built around the AD9625 12-bit, 2500 MSPS analog-to-digital converter with JESD204B interface, supporting synchronized multi-board operation via SYSREF IN/OUT SMA connectors and on-board 2.5 GHz low-noise clocking. It targets rapid prototyping of wideband RF digitization systems.

For engineers reviewing the AD-FMCADC2-EBZ datasheet, AD-FMCADC2-EBZ pinout, AD-FMCADC2-EBZ application, or AD-FMCADC2-EBZ equivalent, key selection considerations include FMC mechanical compliance, JESD204B lane count and subclass support, self-clocking capability, passive 500 kHz–6 GHz front-end bandwidth, and compatibility with Xilinx ZC706/VC707 carrier platforms.

Technical Context

The AD-FMCADC2-EBZ implements a single-channel, high-fidelity ADC subsystem optimized for JESD204B Subclass 1 deterministic latency, using the AD9625 in a fixed configuration with on-board clock synthesis, power regulation (ADP7104, ADP1753A, ADP2119, ADP1741), and ultralow-noise voltage reference (ADR280). It supports both single-ended and differential external clock injection paths, with transformer-coupled default clock routing.

Its front-end employs a broadband 500 kHz–6 GHz passive balun for single-ended-to-differential conversion at the "Ain" SMA input, enabling direct connection to RF signal sources without active amplification or filtering. Synchronization across multiple boards is enabled via dedicated SYSREF IN/OUT SMA terminals compliant with JESD204B timing requirements.

Key Specifications

Availability

AD-FMCADC2-EBZ is available at Aetrix Electronics and suitable for RF test instrumentation, wideband spectrum monitoring, radar prototyping, and FPGA-based digital receiver development requiring stable component supply and full design documentation access.

Supply support for AD-FMCADC2-EBZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD-FMCADC2-EBZ belongs to Analog Devices' evaluation board product line, designed specifically to accelerate validation and integration of high-speed ADCs-particularly AD9625-in FPGA-centric RF and communications systems.

FAQ

What is the primary function of the AD-FMCADC2-EBZ?

The AD-FMCADC2-EBZ is a high-speed FMC evaluation board centered on the AD9625 12-bit, 2500 MSPS ADC. Its primary function is to enable rapid prototyping of wideband digitization systems by providing a fully validated, self-clocking, JESD204B-compliant interface between the ADC and Xilinx FPGA carrier platforms such as ZC706 and VC707. The AD-FMCADC2-EBZ simplifies signal acquisition setup with its passive front-end and integrated power regulation.

Does the AD-FMCADC2-EBZ support multi-board synchronization?

Yes, the AD-FMCADC2-EBZ supports deterministic multi-board synchronization via dedicated SYSREF IN and SYSREF OUT SMA connectors, which align with JESD204B Subclass 1 timing requirements. This allows precise phase-coherent sampling across multiple AD-FMCADC2-EBZ boards when used with compatible FPGA carriers and software drivers. The AD-FMCADC2-EBZ hardware implements these signals with controlled impedance routing and minimal skew.

What clocking options does the AD-FMCADC2-EBZ provide for the AD9625?

The AD-FMCADC2-EBZ offers three clocking configurations: (1) default on-board 2.5 GHz low-noise crystal oscillator routed through a wideband transformer to generate differential ADC clock; (2) external single-ended clock injected at CLK+, bypassing the oscillator; or (3) external differential clock applied directly to CLK+ and CLK− with minor component changes. All options maintain signal integrity for 2500 MSPS operation. The AD-FMCADC2-EBZ schematic documents required modifications for each mode.

Is the AD-FMCADC2-EBZ compliant with the FMC standard?

The AD-FMCADC2-EBZ meets most mechanical and connector specifications defined in ANSI/VITA 57.1-2010, including form factor, mounting hole locations, and Low Pin Count (LPC) FMC connector layout. However, Analog Devices explicitly states it is not a commercial off-the-shelf (COTS) FMC product and is intended for evaluation-not drop-in system integration. The AD-FMCADC2-EBZ prioritizes ADC performance over full COTS interoperability guarantees.

What software and HDL support is provided with the AD-FMCADC2-EBZ?

Analog Devices provides complete open-source HDL (VHDL/Verilog) and Linux software stack for the AD-FMCADC2-EBZ, including the AD9625 Linux driver, ZC706 Linux image, and JESD204B eye scan utilities. Source code enables full project recreation on supported Xilinx platforms, though third-party FPGA IP remains under vendor license. No proprietary binaries or locked firmware are required to operate the AD-FMCADC2-EBZ.