Analog Devices Inc. ADL5590ACPZ-R7
- Part No.:
- ADL5590ACPZ-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- RF Modulators
- Package:
- 36-VFQFN Exposed Pad, CSP
- Datasheet:
-
ADL5590ACPZ-R7.pdf
- Description:
- RF MODULATOR 869MHZ-960MHZ 36QFN
- Quantity:
- Payment:

- Shipping:

Inventory:1,149
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADL5590ACPZ-R7 from Analog Devices is a monolithic RF quadrature modulator optimized for 869–960 MHz GSM/EDGE transmitters, delivering 16 dBm P1dB output power, 29 dBm OIP3 at 900 MHz, and −50 dBc sideband suppression with 1.5 V baseband common-mode bias.
For engineers reviewing the ADL5590ACPZ-R7 datasheet, ADL5590ACPZ-R7 pinout, ADL5590ACPZ-R7 application, or ADL5590ACPZ-R7 equivalent, key selection criteria include its 36-lead LFCSP package, single 5 V supply operation, LO drive range (−1 to +5 dBm), and verified performance in wireless infrastructure base station transmit chains.
Technical Context
The ADL5590ACPZ-R7 integrates a silicon-germanium bipolar quadrature phase splitter and high-linearity double-balanced mixers, enabling direct RF modulation without external image-rejection filtering. Its architecture supports 8 PSK modulation with RMS EVM of 0.4–0.5% at 3 dBm output and maintains ±0.1 dB gain flatness across 869–894 MHz.
It requires externally biased differential I/Q inputs (IBBP/IBBN/QBBP/QBBN) at 1.5 V dc with 9 kΩ input impedance and 250 MHz bandwidth, while the single-ended RF output (VOUT) is internally biased and ac-coupled to a 50 Ω load.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Frequency Range | 869–960 MHz - fully specified operating band for GSM/EDGE base station transmitters |
| P1dB Output Power | 16 dBm - enables high-efficiency power amplifier driver stage without compression |
| OIP3 | 29 dBm at 900 MHz - ensures robust linearity for multi-carrier GSM signals with low adjacent channel leakage |
| Sideband Suppression | <−50 dBc at 900 MHz - minimizes unwanted image energy, reducing post-modulation filtering requirements |
| LO Leakage | −50 dBc at 900 MHz, POUT = 5 dBm - lowers receiver desensitization risk in TDD/FDD co-location scenarios |
| Noise Floor | −156.6 dBm/Hz - supports high dynamic range signal generation with low error vector magnitude |
| Supply Voltage | 4.75–5.25 V - compatible with standard telecom 5 V rails and tolerant of minor rail droop |
Pinout & Package
ADL5590ACPZ-R7 is housed in a 36-lead, 6 mm × 6 mm exposed-pad LFCSP (CP-36-4) with thermal pad connected to ground plane for 40°C/W junction-to-ambient thermal resistance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1,2,5,7–12,14,16–19,22,24,27–30,32,34–36) | Ground reference | Multiple dedicated ground pins ensure low-inductance return paths for RF, baseband, and supply currents |
| VPS1–VPS5 (Pins 3,13,15,31,33) | Positive supply | Five independent 5 V supply pins require individual 0.1 µF bypassing to suppress high-frequency supply noise |
| LOIP / LOIN (Pins 4,6) | Single-ended LO input | AC-coupled 50 Ω interface; LOIN grounded via capacitor, LOIP driven - enables flexible LO routing |
| IBBP / IBBN / QBBP / QBBN (Pins 20,21,25,26) | Differential I/Q baseband inputs | High-impedance (9 kΩ), 250 MHz BW inputs requiring external 1.5 V dc bias - no internal biasing |
| VOUT (Pin 23) | RF output | Single-ended, 50 Ω, internally biased RF output - must be AC-coupled to load to block dc offset |
Key Features
| Feature | Design Value |
|---|---|
| Quadrature accuracy | Phase/amplitude balance enabling <−50 dBc sideband suppression - eliminates need for external calibration circuitry |
| Integrated LO buffer | Supports −1 to +5 dBm LO drive - accommodates both low-power synthesizers and amplified LO sources |
| Thermal design | Exposed pad LFCSP with 40°C/W θJA - sustains 170 mA supply current at +85°C ambient without derating |
| Modulation fidelity | RMS EVM ≤0.5% at 3 dBm, 8 PSK - meets GSM Class 4 and EDGE Class E spectral mask requirements |
| Supply resilience | Full specification over 4.75–5.25 V - operates reliably across telecom 5 V rail tolerances |
Applications
| GSM Base Station Transmitter | EDGE Infrastructure Modulator |
|---|---|
Use Scenario: Final-stage RF upconversion in macrocell BTS before PA and filter stages. IC Role / Device Role / Timing Role: Direct RF quadrature modulator converting baseband I/Q to 869–960 MHz carrier. Use Value: −50 dBc sideband suppression and 29 dBm OIP3 reduce post-modulation filtering complexity and improve ACLR by ≥3 dB. | Use Scenario: Transmit path in distributed antenna systems supporting enhanced data rates. IC Role / Device Role / Timing Role: High-fidelity 8 PSK modulator with RMS EVM ≤0.5% at 3 dBm output. Use Value: Meets EDGE Class E spectral mask without digital pre-distortion, lowering FPGA resource usage. |
| Wireless Test Equipment Signal Source | Private LTE eNodeB Transceiver |
Use Scenario: Programmable RF stimulus generator in production test fixtures for mobile handsets. IC Role / Device Role / Timing Role: Stable, low-noise modulator with −156.6 dBm/Hz noise floor and 0.01 dB/°C gain drift. Use Value: Enables accurate EVM and ACLR measurements down to −79 dBc at 1.2 MHz offset without external LNAs. | Use Scenario: Compact 800/900 MHz band small cell radio unit with integrated transmit chain. IC Role / Device Role / Timing Role: Low-profile, thermally efficient modulator in space-constrained LFCSP package. Use Value: 6 mm × 6 mm LFCSP with exposed pad simplifies thermal management in fanless outdoor enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar quadrature modulator applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADL5375-05ACPZ-R7 | Wider 700–1000 MHz range; lower OIP3 (27 dBm); higher supply current (210 mA) | Better suited for wideband LTE FDD bands; less optimal for narrowband GSM efficiency targets | Select when broader frequency coverage outweighs GSM-specific linearity and power efficiency needs |
| TRF3705IRGZT | 400–4000 MHz range; higher LO drive requirement (+10 dBm); no integrated LO buffer | Requires external LO amplification; better for multi-band lab equipment than fixed-band infrastructure | Choose for reconfigurable test platforms where LO flexibility and frequency agility are prioritized |
Compared with ADL5590ACPZ-R7, ADL5375-05ACPZ-R7 trades GSM-optimized linearity for wider bandwidth and higher current draw, while TRF3705IRGZT offers extreme frequency agility at the cost of added LO support circuitry and reduced integration.
Availability
ADL5590ACPZ-R7 is available at Aetrix Electronics and suitable for wireless infrastructure, GSM base station transmitters, and EDGE-capable radio units requiring stable component supply across extended temperature ranges and high-volume production cycles.
Supply support for ADL5590ACPZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision, power, and connectivity applications.
The ADL5590ACPZ-R7 belongs to Analog Devices' RF quadrature modulator product line, engineered specifically for high-linearity, low-EVM direct RF modulation in cellular infrastructure transmitters.
FAQ
What is the operating frequency range of the ADL5590ACPZ-R7?
The ADL5590ACPZ-R7 operates from 869 MHz to 960 MHz, covering the full GSM 900 MHz band including uplink (880–915 MHz) and downlink (925–960 MHz) segments. This range is fully characterized per the Rev. A datasheet, with guaranteed sideband suppression, OIP3, and EVM performance across the entire span.
Does the ADL5590ACPZ-R7 require external biasing on its baseband inputs?
Yes, the ADL5590ACPZ-R7 requires external dc biasing of its IBBP/IBBN/QBBP/QBBN inputs to 1.5 V - it has no internal bias circuitry. The 9 kΩ differential input impedance and 250 MHz bandwidth necessitate careful layout of bias networks to avoid gain ripple or EVM degradation.
What is the recommended LO drive level for the ADL5590ACPZ-R7?
The ADL5590ACPZ-R7 specifies a nominal LO drive level of −1 dBm to +5 dBm at the LOIP pin, with −50 dBc LO leakage measured at +2 dBm. Driving above +5 dBm is permissible and reduces 6 MHz offset noise, but exceeds absolute maximum ratings if sustained beyond brief intervals.
Can the ADL5590ACPZ-R7 be used in EDGE applications?
Yes, the ADL5590ACPZ-R7 is explicitly qualified for enhanced data rates for GSM evolution (EDGE), delivering RMS EVM ≤0.5% and peak EVM ≤1.4% at 3 dBm output with 8 PSK modulation - meeting Class E spectral mask requirements without digital pre-distortion.
What package type does the ADL5590ACPZ-R7 use, and how should the exposed pad be handled?
The ADL5590ACPZ-R7 uses a 36-lead, 6 mm × 6 mm LFCSP (CP-36-4) with an exposed thermal pad. Per the datasheet, this pad must be soldered to a solid ground plane using multiple vias to achieve the rated 40°C/W θJA; failure to do so risks thermal shutdown above 70°C ambient at full 170 mA current.
ADL5590ACPZ-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 36-VFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Modulator
- LO Frequency:
- -
- RF Frequency:
- 869MHz ~ 960MHz
- P1dB:
- 16dBm
- Noise Floor:
- -156.6dBm/Hz
- Output Power:
- 5.7dBm
- Current - Supply:
- 170 mA
- Voltage - Supply:
- 4.75V ~ 5.25V
- Test Frequency:
- 940MHz
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 36-LFCSP-VQ (6x5.75)
ADL5590ACPZ-R7 FAQ
1.How can I place an order for ADL5590ACPZ-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADL5590ACPZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADL5590ACPZ-R7 reliable?
The price and inventory of ADL5590ACPZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADL5590ACPZ-R7 is usually 5 days.
3.What payment methods are accepted for ADL5590ACPZ-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADL5590ACPZ-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADL5590ACPZ-R7?
ADL5590ACPZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADL5590ACPZ-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADL5590ACPZ-R7?
For technical support, including ADL5590ACPZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADL5590ACPZ-R7 requirements.
6.How does Aetrix verify that ADL5590ACPZ-R7 is sourced from the original manufacturer or authorized distributors?
All ADL5590ACPZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADL5590ACPZ-R7 meets industry standards.
7.What is the process for return or replacement of ADL5590ACPZ-R7?
All ADL5590ACPZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with ADL5590ACPZ-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADL5590ACPZ-R7 part is unused and in its original packaging.
Return procedure for ADL5590ACPZ-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADL5590ACPZ-R7 Tags

-
LTC5599IUF#TRPBF
Analog Devices Inc.

-
LTC5599IUF#PBF
Analog Devices Inc.

-
LTC5589IUF#PBF
Analog Devices Inc.

-
ADL5375-05ACPZ-R7
Analog Devices Inc.

-
ADL5385ACPZ-R7
Analog Devices Inc.

-
AD8346ARUZ-REEL7
Analog Devices Inc.

-
LTC5588IPF-1#PBF
Analog Devices Inc.

-
ADRF6755ACPZ-R7
Analog Devices Inc.

-
TRF370417IRGET
Texas Instruments

-
HMC631LP3ETR
Analog Devices Inc.

-
TRF3705IRGET
Texas Instruments

-
LTC5589IUF#TRPBF
Analog Devices Inc.
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

