Analog Devices Inc. ADM1051AJR
- Part No.:
- ADM1051AJR
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
ADM1051AJR.pdf
- Description:
- IC REG BDGAP DUAL 1.5/1.8V 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:201
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Product details
Overview
ADM1051AJR from Analog Devices is a dual-channel precision voltage regulator controller for PC motherboard AGP/ICH power rail generation and active bus termination. It delivers fixed 1.515 V (Channel 1) and 1.818 V (Channel 2) outputs with ±2.5% accuracy over line, load, and temperature, drives external N-channel MOSFETs in source-follower configuration, and features hiccup-mode fault protection and TYPEDET-compatible multilevel SHDN1 control.
For engineers reviewing the ADM1051AJR datasheet, ADM1051AJR pinout, ADM1051AJR application, or ADM1051AJR equivalent, this page provides verified technical context, real-world design meaning of key specs, validated 8-lead SOIC package mapping, confirmed pin functions, and two field-validated alternative controllers for AGP/ICH sequencing applications.
Technical Context
The ADM1051AJR integrates two independent control amplifiers-each with 100 dB open-loop gain, 3 V/µs slew rate, and 5 µs closed-loop settling time-driving external N-channel MOSFETs as source followers. Channel 1 supports four SHDN1 voltage-defined modes (shutdown, 1.5 V, 3.3 V pass-through, and default 1.5 V), while Channel 2 provides fixed 1.818 V regulation optimized for ICH sequencing compliance.
It operates from a 12 V VCC supply with power-on reset (6–9 V threshold), uses a precision 1.2 V bandgap reference, and implements hiccup-mode protection on Channel 1 only (30–90 ms hold-off, 0.5–1.5 ms on-time, 20–60 ms off-time); Channel 2 hiccup mode is disabled per ADM1051A specification to enforce ≤2 V differential between 1.818 V and 3.3 V rails.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage (Ch1) | 1.515 V nominal; selectable to 3.3 V pass-through via SHDN1 voltage level (4.3–5.3 V) |
| Output Voltage (Ch2) | 1.818 V fixed; no hiccup mode enabled to maintain ≤2 V differential vs. 3.3 V rail |
| Accuracy | ±2.5% over line (3.0–3.6 V), load (10 mA–1 A), and temperature (0°C–70°C) |
| Control Amplifier Slew Rate | 3 V/µs - enables fast transient response during 10 mA ↔ 2 A load steps |
| Hiccup Mode Hold-Off Time | 30–90 ms - prevents false triggering during power-up or channel enable |
| Supply Current (Active) | 2.4–4.0 mA - low quiescent draw suitable for always-on 5 VSB-powered sequencing |
| Shutdown Current | 600–1000 µA - maintains ultra-low power when both channels disabled |
Pinout & Package
ADM1051AJR is housed in an 8-lead narrow-body SOIC package (R-8), with θJA = 150°C/W, rated for 0°C to 70°C operation, and specified for continuous 650 mW dissipation at TA = 70°C.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - FORCE 2 | Channel 2 control amplifier output | Drives gate of external N-MOSFET; swing: 2 V (low) to 10 V (high) into 10 kΩ |
| 2 - SENSE 2 | Inverting input for Channel 2 feedback | Connects to MOSFET source to close regulation loop; 50 kΩ input impedance |
| 3 - SHDN2 | Active-low shutdown control for Channel 2 | Internal 50 µA pull-up; <0.8 V forces output low; ≥2.0 V enables regulation |
| 4 - GND | Analog and power ground reference | Must be connected to low-impedance load ground point, separate from high-current return paths |
| 5 - SHDN1 | Multi-level control input for Channel 1 | Four-mode operation: <0.8 V (shutdown), 2–3.9 V (1.5 V), 4.3–5.3 V (3.3 V pass), >6.2 V/floating (1.5 V) |
| 6 - SENSE 1 | Inverting input for Channel 1 feedback | Connects to Channel 1 MOSFET source; same 50 kΩ impedance as SENSE 2 |
| 7 - FORCE 1 | Channel 1 control amplifier output | Optimized for high gate capacitance MOSFETs (e.g., PHD55N03LT); same swing specs as FORCE 2 |
| 8 - VCC | Main 12 V supply input | Power-on reset activates above 6–9 V; powers internal bandgap, amplifiers, and logic |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent controllers | Enables simultaneous 1.515 V AGP rail + 1.818 V ICH rail generation on single die, reducing BOM count and layout area |
| TYPEDET-compatible SHDN1 | Eliminates need for external logic or voltage translators when interfacing with PC motherboard AGP TYPEDET signal |
| No external setting resistors | Fixed 1.515 V / 1.818 V outputs are internally trimmed; eliminates resistor tolerance errors and layout sensitivity |
| Hiccup-mode fault protection | Self-resetting 1:40 duty-cycle pulsing protects external MOSFET during sustained short-circuit without external current sense circuitry |
| 12 V VCC drive for N-MOSFETs | Enables use of lower-cost, higher-performance N-channel devices in source-follower topology versus P-channel alternatives |
Applications
| AGP Graphics Power Supply | ICH Core Voltage Regulation |
|---|---|
|
Use Scenario: Generating stable 1.5 V or 3.3 V supply for AGP 2×/4× graphics interface on desktop motherboard. IC Role / Device Role / Timing Role: Dual-channel controller providing precise, sequenced rail generation with TYPEDET-driven voltage selection and hiccup-mode fault containment. Use Value: Eliminates discrete logic for AGP mode detection and reduces external component count by integrating both regulators and protection in one SOIC-8 device. |
Use Scenario: Delivering tightly regulated 1.818 V core voltage to Intel I/O Control Hub chipsets requiring strict sequencing relative to 3.3 V supply. IC Role / Device Role / Timing Role: Channel 2 acts as dedicated, hiccup-disabled regulator ensuring V1.8V never falls >2 V below 3.3 V rail during power-up or transient events. Use Value: Meets ICH chipset sequencing mandates without external delay circuits or monitoring ICs-enabling robust, single-chip compliance. |
| Active Bus Termination | Desktop Motherboard Power Management |
|
Use Scenario: Providing low-noise, dynamically adjustable termination voltage for high-speed parallel buses (e.g., AGP, PCI-X). IC Role / Device Role / Timing Role: Regulator controller driving low-RDS(on) N-MOSFETs to deliver clean, load-compensated termination bias matching bus signaling levels. Use Value: Achieves <±2.5% output accuracy across temperature and load-critical for maintaining signal integrity and minimizing reflections on terminated lines. |
Use Scenario: Managing multiple low-voltage rails on commercial desktop motherboards with standby (5 VSB) and main (12 V) supply inputs. IC Role / Device Role / Timing Role: Enables hybrid power-up: Channel 2 powered from 5 VSB for early availability; Channel 1 delayed by POR until 12 V stabilizes. Use Value: Supports ATX power sequencing standards while minimizing inrush and enabling graceful startup even if 12 V lags 5 VSB. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel voltage regulator controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADM1051JR | Same silicon, identical electrical specs, but lacks ADM1051A-specific sequencing logic (e.g., Channel 2 hiccup disable, 5 VSB-compatible startup) | Not suitable for ICH-compliant designs requiring enforced 1.818 V/3.3 V sequencing; acceptable for legacy AGP-only boards | Select ADM1051JR only when TYPEDET support is needed but ICH sequencing constraints do not apply. |
| TPS51100PWR | Single-channel 1.5 V/1.8 V programmable controller with integrated MOSFET drivers; no SHDN1 multilevel logic or hiccup hold-off timing match | Requires external logic for AGP mode selection; lacks native 3.3 V pass-through capability and dual independent shutdown controls | Choose TPS51100PWR only when board space allows two separate controllers and sequencing is managed externally. |
Compared with ADM1051JR, the ADM1051AJR adds mandatory hiccup disable on Channel 2 and 5 VSB-compatible startup for ICH compliance; compared with TPS51100PWR, it integrates dual independent control, TYPEDET-native voltage selection, and proven motherboard-level fault handling in one SOIC-8 package.
Availability
ADM1051AJR is available at Aetrix Electronics and suitable for desktop computers, servers, and workstations requiring stable component supply, precise dual-rail generation, and long-term lifecycle continuity for legacy PC platform designs.
Supply support for ADM1051AJR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and computing markets since 1965.
The ADM1051AJR belongs to Analog Devices' precision power management controller family, designed specifically for PC motherboard AGP/ICH rail generation, active bus termination, and robust fault-tolerant sequencing in noise-sensitive computing environments.
FAQ
What is the key functional difference between ADM1051AJR and ADM1051JR?
The ADM1051AJR incorporates specific enhancements for ICH chipset compatibility: Channel 2 hiccup mode is disabled to prevent its output from falling more than 2 V below the 3.3 V rail, and its startup sequence supports 5 VSB-powered pre-enablement. The ADM1051JR lacks these features and is intended for standard AGP applications only. Both share identical pinout, package, and core regulation specs.
How does ADM1051AJR implement TYPEDET signal compatibility?
The ADM1051AJR uses SHDN1 as a multilevel input: connecting it to 0 V shuts down Channel 1, 2–3.9 V selects 1.5 V output, 4.3–5.3 V forces 3.3 V pass-through, and floating or >6.2 V defaults to 1.5 V. This matches AGP TYPEDET logic states directly-no external level shifters or logic gates required-making ADM1051AJR ideal for AGP 2×/4× motherboard designs.
What external MOSFETs are recommended for ADM1051AJR Channel 1 and Channel 2?
For Channel 1, Analog Devices recommends low-RDS(on), high-gate-capacitance N-MOSFETs like the PHD55N03LT (Philips) to minimize voltage drop in 3.3 V pass-through mode. For Channel 2, devices such as the MTD3055VL (Motorola) or PHB11N06LT (Philips) are specified-optimized for stable 1.818 V regulation with adequate thermal margin under full load.
Does ADM1051AJR require external resistors to set output voltages?
No. The ADM1051AJR has internally trimmed, fixed output voltages: 1.515 V for Channel 1 and 1.818 V for Channel 2. No external feedback resistors are needed-unlike general-purpose controllers-reducing component count, eliminating resistor tolerance errors, and simplifying PCB layout for high-accuracy applications.
What is the purpose of the hiccup-mode hold-off time in ADM1051AJR?
The hiccup-mode hold-off time (30–90 ms) prevents false triggering during power-up or channel enable events, when output voltage is still ramping. It ensures the regulator reaches regulation before hiccup protection activates-critical for reliable startup in PC motherboards where rail sequencing must complete before downstream logic initializes. This hold-off applies to both channels, even if only one is enabled.
ADM1051AJR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Output Type:
- Transistor Driver
- Function:
- Step-Down
- Output Configuration:
- Positive
- Topology:
- Buck
- Number of Outputs:
- 2
- Output Phases:
- 1
- Voltage - Supply (Vcc/Vdd):
- 12V
- Frequency - Switching:
- -
- Duty Cycle (Max):
- -
- Synchronous Rectifier:
- No
- Clock Sync:
- No
- Serial Interfaces:
- -
- Control Features:
- Enable, Frequency Control, Power on Reset
- Operating Temperature:
- 0°C ~ 70°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
ADM1051AJR FAQ
1.How can I place an order for ADM1051AJR through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM1051AJR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM1051AJR reliable?
The price and inventory of ADM1051AJR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1051AJR is usually 5 days.
3.What payment methods are accepted for ADM1051AJR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1051AJR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM1051AJR?
ADM1051AJR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM1051AJR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM1051AJR?
For technical support, including ADM1051AJR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1051AJR requirements.
6.How does Aetrix verify that ADM1051AJR is sourced from the original manufacturer or authorized distributors?
All ADM1051AJR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1051AJR meets industry standards.
7.What is the process for return or replacement of ADM1051AJR?
All ADM1051AJR units undergo pre-shipment inspection (PSI). If there is an issue with ADM1051AJR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM1051AJR part is unused and in its original packaging.
Return procedure for ADM1051AJR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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