Analog Devices Inc. ADM1052JR
- Part No.:
- ADM1052JR
- Manufacturer:
- Analog Devices Inc.
- Category:
- DC DC Switching Controllers
- Package:
- -
- Datasheet:
-
ADM1052JR.pdf
- Description:
- IC REG BDGAP PREC DUAL 8SOIC
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Product details
Overview
ADM1052JR from Analog Devices is a dual-channel precision voltage regulator controller for active bus termination and 2.525 V power rail generation on PC motherboards. It integrates two independent control amplifiers, a 1.2 V bandgap reference, hiccup-mode fault protection, and operates from a 12 V supply to drive external N-channel MOSFETs as source-followers.
For engineers reviewing the ADM1052JR datasheet, ADM1052JR pinout, ADM1052JR application, or ADM1052JR equivalent, this device supports high-accuracy (±2.5%) dual-output regulation with per-channel shutdown, low quiescent current (4.0 mA), and transient response under 5 µs - critical for desktop/server power integrity design.
Technical Context
The ADM1052JR implements two identical closed-loop control channels, each using an internal 1.2 V reference amplified to regulate 2.525 V outputs via external N-MOSFETs in source-follower configuration. Each channel features independent shutdown inputs with 50 µA internal pull-up and hiccup-mode protection triggered at 0.8 × VOUT.
Its control amplifiers deliver 100 dB open-loop gain, 3 V/µs slew rate, and 5 µs closed-loop settling time under 10 mA–2 A load steps. The device incorporates a power-on reset circuit that holds outputs disabled until VCC exceeds 6–9 V, and includes glitch-immune hiccup comparators with 100 µs immunity and programmable hold-off timing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Output Voltage | 2.525 V per channel - precisely set by internal reference and feedback topology, no external resistors required. |
| Output Accuracy | ±2.5% over line (3.0–3.6 V), load (10 mA–1 A), and temperature (0°C–70°C) - ensures stable DDR/SRAM termination voltage. |
| Control Amplifier Slew Rate | 3 V/µs - enables fast gate charging of external N-MOSFETs for sub-5 µs load transient recovery. |
| Hiccup Mode Threshold | 0.8 × VOUT (≈2.02 V) - detects output collapse due to short-circuit and initiates pulsed 1:40 duty-cycle protection. |
| Supply Current (Active) | 4.0 mA max at 12 V - minimizes auxiliary power draw in multi-rail motherboard systems. |
| Shutdown Current | 1000 µA max with both channels disabled - supports low-power standby states without external disable circuitry. |
| Power-On Reset Threshold | 6–9 V on VCC - prevents premature regulator enable during 12 V rail ramp-up, avoiding uncontrolled inrush. |
Pinout & Package
ADM1052JR is housed in an 8-lead SOIC (SO-8) package with standard narrow-body dimensions (5.00 mm × 4.00 mm), JEDEC MS-012 compliant, thermal resistance θJA = 150°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - FORCE 2 | Channel 2 amplifier output | Drives gate of external N-MOSFET; capable of sourcing/sinking sufficient current for <2 A load transients. |
| 2 - SENSE 2 | Channel 2 feedback input | Connects to MOSFET source node; senses regulated output voltage for closed-loop error correction. |
| 3 - SHDN2 | Channel 2 active-low enable | Pulled up internally (50 µA); pulling low disables Channel 2 amplifier output and forces FORCE2 low. |
| 4 - GND | Analog ground reference | Common return for all internal circuitry; must be routed separately from high-current load ground paths. |
| 5 - SHDN1 | Channel 1 active-low enable | Identical function to SHDN2; allows independent sequencing of dual 2.525 V rails. |
| 6 - SENSE 1 | Channel 1 feedback input | Same role as SENSE2; requires Kelvin connection to load for ±2.5% accuracy. |
| 7 - FORCE 1 | Channel 1 amplifier output | Matches FORCE2 electrically; drives first external N-MOSFET gate with identical drive strength. |
| 8 - VCC | 12 V supply input | Primary power for internal amplifiers, reference, and logic; requires 1 µF local decoupling to GND. |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent controllers | Enables simultaneous regulation of two 2.525 V rails (e.g., CPU I/O and memory termination) with separate shutdown control. |
| No external setting resistors | Fixed 2.525 V output derived from internal 1.2 V bandgap and precision amplifier gain - eliminates resistor tolerance errors and layout sensitivity. |
| Hiccup-mode fault protection | Self-contained short-circuit protection without current-sense resistors or external ICs - reduces BOM count and PCB area. |
| N-channel MOSFET support | Lowers system cost and improves stability vs. P-channel alternatives by leveraging cheaper, higher-performance N-MOS devices in source-follower topology. |
| Low quiescent current | 4.0 mA typical operation enables use in always-on power domains without compromising system efficiency. |
Applications
| Desktop Computer Motherboard | Server Memory Subsystem |
|---|---|
Use Scenario: Generating matched 2.525 V termination voltages for DDR SDRAM data buses on ATX form-factor motherboards. IC Role / Device Role / Timing Role: Dual-channel voltage regulator controller providing active bus termination reference with per-lane shutdown capability. Use Value: Maintains signal integrity across high-speed parallel buses by delivering ±2.5% accurate, low-noise 2.525 V rails with sub-5 µs transient response to burst loads. |
Use Scenario: Supplying precise 2.525 V termination for registered DIMM address/control lines in dual-CPU server platforms. IC Role / Device Role / Timing Role: Precision dual-controller managing independent termination rails for memory channel A and B, synchronized via shared VCC ramp. Use Value: Enables reliable multi-GHz memory operation by eliminating voltage drift-induced setup/hold violations during thermal cycling. |
| Workstation Graphics Card | Industrial Embedded Controller |
Use Scenario: Regulating 2.525 V for GPU memory interface termination in PCIe-based workstation graphics cards. IC Role / Device Role / Timing Role: Dual-output controller driving external N-MOSFETs to supply termination voltage for GDDR5/GDDR6 memory subsystems. Use Value: Delivers hiccup-mode protection against GPU VRM faults while maintaining tight regulation during rapid GPU clock scaling events. |
Use Scenario: Providing stable 2.525 V bus termination for FPGA I/O banks in ruggedized industrial control modules operating 0°C–70°C. IC Role / Device Role / Timing Role: Precision analog controller supporting long-life, maintenance-free operation with no external trimming components. Use Value: Ensures consistent I/O voltage margin across product lifetime by eliminating resistor aging effects and reducing thermal drift sensitivity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-voltage regulator controller applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LM2678-ADJ (Texas Instruments) | Single-channel buck controller; adjustable output; requires external feedback resistors and inductor. | Not dual-output; lacks hiccup mode; needs discrete compensation network. | Select only when single-rail, higher-current (>3 A) buck conversion is needed instead of precision 2.525 V linear-style termination. |
| TPS51100 (Texas Instruments) | Dual-channel 2.5 V DDR termination controller; integrated MOSFET drivers; supports 1.8 V/2.5 V selection. | Higher integration (drivers onboard); wider input range (3–28 V); no external MOSFET required. | Prefer for new designs requiring lower component count and tighter board space constraints; not drop-in compatible with ADM1052JR footprint. |
Compared with LM2678-ADJ and TPS51100, the ADM1052JR uniquely delivers fixed 2.525 V dual outputs with zero-resistor configuration, hiccup-mode protection, and SO-8 footprint optimized for legacy PC motherboard layouts - making it irreplaceable where exact pin compatibility and minimal BOM are mandatory.
Availability
ADM1052JR is available at Aetrix Electronics and suitable for desktop computers, servers, and workstations requiring stable component supply with guaranteed commercial-temperature (0°C to 70°C) performance and long-term obsolescence management.
Supply support for ADM1052JR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and computing markets since 1965.
The ADM1052JR belongs to Analog Devices' precision power management controller family, designed specifically for PC motherboard power integrity - emphasizing accuracy, fault resilience, and seamless integration with N-channel MOSFETs for cost-sensitive high-volume applications.
FAQ
What is the output voltage accuracy of the ADM1052JR over temperature and load?
The ADM1052JR guarantees ±2.5% output voltage accuracy across 0°C to 70°C, 3.0 V to 3.6 V input, and 10 mA to 1 A load. This specification is validated per the datasheet test conditions and reflects total error including line, load, and temperature effects - critical for DDR termination compliance. The ADM1052JR achieves this without external resistors, relying on its internal 1.2 V bandgap and trimmed amplifier gain.
Does the ADM1052JR require external MOSFETs, and what type is supported?
Yes, the ADM1052JR requires external N-channel MOSFETs configured as source-followers - explicitly confirmed in the functional block diagram and General Description. It does not support P-channel or integrated-FET topologies. Recommended devices include PHD55N03LT and MTD3055VL, selected for RDS(on) compatibility with hiccup threshold calculation. The ADM1052JR's FORCE pins provide sufficient gate drive for ≤2 A loads.
How does hiccup-mode protection work in the ADM1052JR?
Hiccup mode in the ADM1052JR activates when either output falls below 0.8 × 2.525 V (≈2.02 V), triggering a 1:40 duty-cycle pulsing of the affected channel's control amplifier. The off-time is 20–60 ms and on-time is 0.5–1.5 ms, limiting average power dissipation during short circuits. A 30–90 ms hold-off period prevents false triggering during power-up. This behavior is intrinsic to the ADM1052JR and requires no external components.
What is the purpose of the SHDN1 and SHDN2 pins on the ADM1052JR?
SHDN1 and SHDN2 are active-low digital inputs that independently disable Channels 1 and 2 of the ADM1052JR. Each has a 50 µA internal pull-up, allowing direct connection to logic signals or leaving floating for normal operation. When asserted low, the corresponding FORCE output is driven to ground, turning off the external MOSFET. This enables per-rail power sequencing - a key feature used in the ADM1052JR for staggered enable of memory and I/O termination rails.
Is the ADM1052JR pin-compatible with newer Analog Devices regulators like the ADM1178?
No, the ADM1052JR is not pin-compatible with the ADM1178 or other modern Analog Devices hot-swap or PMBus controllers. The ADM1178 is a 10-pin MSOP device with current sensing, digital interface, and different pin functions (e.g., SDA/SCL, ALERT). The ADM1052JR's 8-pin SOIC layout, FORCE/SENSE/SHDN pin assignments, and analog-only architecture are unique to its generation and application - replacement requires full schematic and layout revision.
ADM1052JR Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- -
- Packaging:
- Tube
- Product Status:
- Obsolete
- Output Type:
- -
- Function:
- -
- Output Configuration:
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- Topology:
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- Number of Outputs:
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- Output Phases:
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- Voltage - Supply (Vcc/Vdd):
- -
- Frequency - Switching:
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- Duty Cycle (Max):
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- Synchronous Rectifier:
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- Clock Sync:
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- Serial Interfaces:
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- Control Features:
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- Operating Temperature:
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- Grade:
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- Qualification:
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- Mounting Type:
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- Supplier Device Package:
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ADM1052JR FAQ
1.How can I place an order for ADM1052JR through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM1052JR on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM1052JR reliable?
The price and inventory of ADM1052JR are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1052JR is usually 5 days.
3.What payment methods are accepted for ADM1052JR?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1052JR transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM1052JR?
ADM1052JR orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM1052JR order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM1052JR?
For technical support, including ADM1052JR datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1052JR requirements.
6.How does Aetrix verify that ADM1052JR is sourced from the original manufacturer or authorized distributors?
All ADM1052JR products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1052JR meets industry standards.
7.What is the process for return or replacement of ADM1052JR?
All ADM1052JR units undergo pre-shipment inspection (PSI). If there is an issue with ADM1052JR, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM1052JR part is unused and in its original packaging.
Return procedure for ADM1052JR:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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