Analog Devices Inc. ADM1060ARU
- Part No.:
- ADM1060ARU
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 28-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
ADM1060ARU.pdf
- Description:
- IC SUPERVISOR 7 CHANNEL 28TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,680
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Product details
Overview
ADM1060ARU from Analog Devices is a programmable supervisory/sequencing IC for multivoltage communications systems, featuring 7 independent supply fault detectors (1 high-voltage up to +14.4 V, 4 positive-only up to +6 V, 2 bipolar ±2 V to ±6 V), watchdog timeout programmable from 200 ms to 12.8 s, and 9 configurable programmable driver outputs (PDOs) supporting charge-pumped high-drive mode for external N-FET gate control. It enables ordered power-up/down sequencing in central office systems and high-density server boards.
For engineers reviewing the ADM1060ARU datasheet, ADM1060ARU pinout, ADM1060ARU application, or ADM1060ARU equivalent, key selection considerations include supply fault detection range flexibility, SMBus-programmable logic sequencing with 0–500 ms per-edge delays, EEPROM-based configuration persistence, internal charge-pump capability on PDO1–PDO4, and support for both undervoltage/overvoltage/out-of-window fault detection with programmable hysteresis and glitch filtering.
Technical Context
The ADM1060ARU implements a programmable logic block array (PLBA) composed of nine macrocells-each controlling one PDO-with combinational and sequential logic routing across all inputs (VH, VPn, VBn, GPI, WDI). Each macrocell output feeds into an independently programmable delay block (0–500 ms rising/falling edge delay), enabling precise inter-supply timing dependencies such as "PDO1 asserts only after VP2, VP3, VP4 are in tolerance AND VB1/VH have been stable for 200 ms AND PDO7 is asserted."
Supply arbitration uses diode-OR plus synchronous rectifier switches to select VDDCAP from the highest valid input among VH (≥4.75 V) or any VPn (≥3.0 V), minimizing dropout to ~0.2 V; VBn supplies cannot power the device. The internal 5.25 V regulated supply powers core logic, while a separate charge-pump circuit generates up to 14 V on PDO1–PDO4 for driving external N-channel FETs in supply paths.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VH Input Range | +2 V to +14.4 V - supports backplane-derived high-voltage rails like +12 V or +5 V standby without external level-shifting. |
| VPn Input Range | +2 V to +6 V - covers standard logic rails (3.3 V, 5 V) and DSP I/O/core supplies with ±1.0% factory-calibrated threshold accuracy. |
| VBn Input Range | ±2 V to ±6 V - enables fault monitoring of dual-rail analog sections (e.g., ±5 V op-amp supplies) with ±1.5% factory-calibrated accuracy. |
| Watchdog Timeout | 200 ms to 12.8 s (8 programmable steps) - allows alignment with processor boot sequences or firmware initialization windows. |
| Programmable Delay | 0–500 ms per edge (rising/falling) - provides deterministic sequencing intervals between supply enable signals without external timers. |
| Charge-Pump Output | 11–14 V at 20 µA (PDO1–PDO4) - drives gate of external N-FETs to implement hot-swap or supply enable with minimal BOM overhead. |
| EEPROM Capacity | 256 bytes user-accessible - stores system ID, date code, or custom configuration data alongside device setup registers. |
Pinout & Package
ADM1060ARU is housed in a 28-lead TSSOP package (4.4 mm × 9.7 mm, 0.65 mm pitch) with exposed thermal pad. Power and signal pins are arranged to minimize noise coupling between high-voltage detection inputs (VH), bipolar inputs (VB1/VB2), and digital interfaces (SCL/SDA).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VH | High-voltage supply input & fault detector | Accepts +2 V to +14.4 V; used for arbitration and high-side rail monitoring; internal 52 kΩ impedance to GND. |
| VP1–VP4 | Positive-only supply inputs & fault detectors | Each monitors +2 V to +6 V rails (e.g., 3.3 V, 5 V); supports undervoltage/overvoltage/out-of-window detection with 15.6 mV resolution. |
| VB1, VB2 | Bipolar supply inputs & fault detectors | Monitor ±2 V to ±6 V rails (e.g., ±5 V analog supplies); polarity selectable per channel; 190 kΩ impedance in negative mode. |
| GPI1–GPI4 | General-purpose logic inputs | Accept 0–5.5 V logic levels; configurable as edge-triggered or level-sensitive; support system-level control gating (e.g., POWER_GOOD). |
| WDI | Watchdog timer input | Detects missing clock edges; timeout programmable from 200 ms to 12.8 s; glitch-filtered to reject transient noise. |
| PDO1–PDO9 | Programmable driver outputs | 9 outputs supporting open-collector, internal pull-up (to VDDCAP or VPn), or charge-pump high-drive (PDO1–PDO4 only). |
| SCL, SDA | SMBus serial interface | Industry-standard 2-wire bus (up to 400 kHz); supports read/write of configuration registers and EEPROM; VIH = 2.0 V, VIL = 0.8 V. |
| VDDCAP | Decoupled internal supply node | Output of VDD arbitrator; requires 1 µF external capacitor to GND; maintains operation during brownouts via reservoir function. |
| VCCP | Charge-pump reservoir node | Supplies internal charge pump for PDO1–PDO4 high-drive mode; requires dedicated 1 µF decoupling capacitor. |
Key Features
| Feature | Design Value |
|---|---|
| 7-channel programmable supply fault detection | Configurable UV/OV/out-of-window detection per channel with 8-bit DAC thresholds and 5-bit hysteresis - eliminates need for discrete comparators and voltage references. |
| PLBA-based sequencing logic | Nine macrocells with cross-coupling capability and per-output 0–500 ms edge delays - enables complex dependency trees (e.g., "enable DSP core before I/O") without FPGA or microcontroller. |
| Internally charge-pumped PDOs (1–4) | Generates 11–14 V gate drive from 3.3 V/5 V supplies - allows direct control of external N-FETs for supply enable, reducing component count vs. discrete level-shifters. |
| 256-byte user EEPROM | Dedicated nonvolatile storage accessible via SMBus - retains system-specific identifiers, calibration data, or field-upgradable configurations across power cycles. |
| Supply arbitration with synchronous rectification | Chooses VDDCAP from highest valid VPn (≥3.0 V) or VH (≥4.75 V) with <0.2 V dropout - ensures longest possible supervision window during partial supply failure. |
Applications
| Central Office Power Management | Server Board Sequencing |
|---|---|
|
Use Scenario: Monitoring and sequencing multiple DC/DC-derived supplies (e.g., +3.3 V, +5 V, –5 V, +12 V) on telecom line cards where strict power-up order prevents latch-up or communication errors. IC Role / Device Role / Timing Role: Supervisory sequencer enforcing pre-defined enable/disable timing between supply domains using PLBA logic and programmable delays. Use Value: Eliminates risk of DSP core damage due to premature I/O activation by ensuring core supply stabilizes ≥200 ms before I/O rail enable. |
Use Scenario: Coordinating power delivery to CPU, memory, and peripheral rails on dense 1U server motherboards with >7 independent voltage domains. IC Role / Device Role / Timing Role: Fault detector and sequencer managing VPn/VH/VBn inputs to assert RESET, POWER_GOOD, and enable signals via PDOs with sub-100 µs glitch immunity. Use Value: Reduces boot-time failures by detecting out-of-tolerance conditions on +1.8 V memory rails before enabling DDR controller clocks. |
| Infrastructure Network Board Control | High-Density Multivoltage Card Supervision |
|
Use Scenario: Enabling hot-swap capability on modular switch fabric cards where individual line cards must be powered in sequence without disrupting backplane operation. IC Role / Device Role / Timing Role: High-drive PDO output (e.g., PDO2) driving external N-FET gate to control +3.3 V card supply, synchronized with watchdog timeout and VPn status. Use Value: Enables safe insertion/removal by asserting supply enable only after backplane +12 V is stable and local watchdog is cleared. |
Use Scenario: Managing power sequencing across mixed-signal FPGA boards with analog ±5 V, digital 1.2 V core, and 3.3 V I/O supplies requiring staggered ramp-up. IC Role / Device Role / Timing Role: Bipolar SFD monitoring –5 V analog rail while positive SFDs track 1.2 V and 3.3 V domains; PLBA enforces inter-rail timing constraints. Use Value: Prevents analog section saturation by delaying 3.3 V I/O enable until ±5 V rails settle within ±1.5% (factory-calibrated accuracy). |
Equivalent & Alternatives
The following parts are listed as comparable options for similar supervisory/sequencing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| TPS386000RGPT | 6-channel supervisor with fixed thresholds (no programmable SFD ranges), no bipolar supply support, no charge-pump outputs. | Limited to unipolar supplies; lacks sequencing logic and EEPROM persistence; suitable only for simple reset generation. | Select when cost sensitivity outweighs configurability needs and system uses only positive rails with fixed thresholds. |
| MAX16050ETL+ | 8-channel sequencer with 12-bit SFD thresholds, but no internal charge pump; supports only positive supplies up to +5.5 V. | No support for ± rails or high-voltage (>6 V) monitoring; sequencing logic less flexible (no macrocell cross-coupling). | Choose for higher-resolution threshold setting on low-voltage systems where bipolar or >6 V rails are absent. |
Compared with TPS386000RGPT and MAX16050ETL+, the ADM1060ARU uniquely combines bipolar supply monitoring, high-voltage detection up to +14.4 V, internally charge-pumped PDOs for FET gate drive, and full PLBA-based sequencing logic - making it the only option capable of autonomous multirail coordination in telecom infrastructure and high-end servers.
Availability
ADM1060ARU is available at Aetrix Electronics and suitable for central office systems, server board designs, and infrastructure network boards requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for ADM1060ARU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and a focus on precision signal chain solutions.
The ADM1060ARU belongs to Analog Devices' power supervision and sequencing product line, engineered specifically for multivoltage communications infrastructure where reliable fault detection, deterministic sequencing, and nonvolatile configuration storage are critical.
FAQ
What is the maximum input voltage the ADM1060ARU can monitor on its VH pin?
The ADM1060ARU supports a VH input voltage range of +2 V to +14.4 V, with absolute maximum rating of 17 V. This allows direct monitoring of common backplane-derived rails such as +12 V or +5 V standby without external attenuation. Operation above +14.4 V risks violating specification limits and may trigger fault conditions or damage the pin.
Can the ADM1060ARU monitor negative supply rails, and if so, how many?
Yes, the ADM1060ARU monitors two independent negative supply rails via its VB1 and VB2 pins, each supporting –2 V to –6 V in negative mode. Polarity is selected per channel using Bit 7 of the BS1SEL/BS2SEL register. These inputs cannot power the device, and their detection accuracy is specified at ±1.5% factory-calibrated.
Does the ADM1060ARU require external components to operate, and which ones are mandatory?
Yes, the ADM1060ARU requires two mandatory external capacitors: a 1 µF (minimum 0.1 µF) capacitor from VDDCAP to GND for supply decoupling and brownout hold-up, and a second 1 µF (minimum 0.1 µF) capacitor from VCCP to GND to support the internal charge pump. No external resistors or level shifters are required for basic operation.
How does the ADM1060ARU handle power supply arbitration when multiple inputs are active?
The ADM1060ARU uses an internal VDD arbitrator with diode-OR plus synchronous rectifier switches to select VDDCAP from the highest valid supply among VH (≥4.75 V) or any VPn (≥3.0 V). Voltage drop is minimized to ~0.2 V. If two supplies differ by <100 mV, the first to reach regulation retains control unless the other exceeds it by >100 mV.
What types of fault detection does the ADM1060ARU support per supply input?
The ADM1060ARU supports three fault detection modes per supply input: undervoltage (UV), overvoltage (OV), or out-of-window (UV OR OV). Only one mode can be active per SFD channel at a time, selected via Bits 0–1 of the _SnSEL register. Each mode uses independent 8-bit DAC-programmed thresholds and 5-bit hysteresis settings.
ADM1060ARU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- Super Sequencer®
- Package/Case:
- 28-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Type:
- Sequencer
- Number of Voltages Monitored:
- 7
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Programmable
- Reset:
- -
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSSOP
ADM1060ARU FAQ
1.How can I place an order for ADM1060ARU through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM1060ARU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM1060ARU reliable?
The price and inventory of ADM1060ARU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1060ARU is usually 5 days.
3.What payment methods are accepted for ADM1060ARU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1060ARU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM1060ARU?
ADM1060ARU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM1060ARU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM1060ARU?
For technical support, including ADM1060ARU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1060ARU requirements.
6.How does Aetrix verify that ADM1060ARU is sourced from the original manufacturer or authorized distributors?
All ADM1060ARU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1060ARU meets industry standards.
7.What is the process for return or replacement of ADM1060ARU?
All ADM1060ARU units undergo pre-shipment inspection (PSI). If there is an issue with ADM1060ARU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM1060ARU part is unused and in its original packaging.
Return procedure for ADM1060ARU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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