Analog Devices Inc. ADM1062ACPZ-REEL7
- Part No.:
- ADM1062ACPZ-REEL7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 40-VFQFN Exposed Pad, CSP
- Datasheet:
-
ADM1062ACPZ-REEL7.pdf
- Description:
- IC SUPERVISOR 10 CHANNEL 40LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:1,277
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADM1062ACPZ-REEL7 from Analog Devices is a configurable supervisory and sequencing IC for multivoltage systems, integrating 10 supply fault detectors (±1% accuracy), a 12-bit ADC for voltage readback, six 8-bit DACs for closed-loop margining (0.300 V–1.551 V), internal/external temperature sensing, and a state-machine-based sequencing engine. It supports complex power-up/down sequencing in DSP/FPGA supply rails.
For engineers reviewing the ADM1062ACPZ-REEL7 datasheet, ADM1062ACPZ-REEL7 pinout, ADM1062ACPZ-REEL7 application, or ADM1062ACPZ-REEL7 equivalent, key selection criteria include its 40-lead 6 mm × 6 mm LFCSP package, SMBus programmability, charge-pumped high-voltage PDO outputs (up to 14 V), dual-mode VXx inputs (analog fault detection or digital logic), and integrated EEPROM for configuration persistence.
Technical Context
The ADM1062ACPZ-REEL7 implements a deterministic state-machine sequencing engine with up to 63 programmable states, enabling conditional output transitions based on input events (e.g., supply OK, fault, timer expiry). Its 12-bit SAR ADC digitizes VH, VPx, and VXx inputs-attenuated per selected range-with round-robin scanning and 16× averaging support.
Margining is implemented via six buffered 8-bit DACs driving dc-to-dc converter feedback or reference nodes; each DAC offers four center-point ranges (0.6 V to 1.25 V) and ±0.75 LSB INL. The device powers itself from the highest active VPx or VH rail (3.0 V–14.4 V), regulating to 4.75 V on VDDCAP with 10 μF decoupling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply supervision inputs | 10 total: VH (6–14.4 V), VP1–VP4 (1.25–6 V), VX1–VX5 (0.573–1.375 V); ±1% threshold accuracy across temp |
| ADC resolution & range | 12-bit SAR ADC; converts all supervised voltages with 0.44 ms/conversion, 84 ms full 12-channel scan with averaging |
| DAC outputs | Six 8-bit voltage-output DACs; 0.300 V–1.551 V range, 2.36 mV/LSB, ±0.75 LSB INL, 2 μs settling to 50 pF load |
| Programmable outputs | 10 PDOs: PDO1–PDO6 support charge-pumped HV mode (12.5 V typical @ 1 μA), PDO1–PDO10 support LV push-pull/open-collector modes |
| Temperature sensing | Internal sensor (±3°C), remote diode interface (DP/DN), 0.125°C resolution, 200 μA current source |
| Interface & memory | SMBus 2-wire interface (400 kHz), 256-byte user EEPROM for persistent configuration storage |
Pinout & Package
ADM1062ACPZ-REEL7 is housed in a 40-lead, 6 mm × 6 mm LFCSP package with exposed pad (NC, recommended for mechanical stability). Pin functions are validated per Analog Devices' Rev. D datasheet Figure 3 and Table 4.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VH, VP1–VP4, VX1–VX5 | Supervision inputs | VH accepts 6–14.4 V (high/mid range); VPx supports 1.25–6 V (low/mid); VXx provides 0.573–1.375 V ultralow-range analog monitoring or digital logic input |
| DAC1–DAC6 | Voltage output terminals | Buffered 8-bit DAC outputs; default high-impedance at power-up; drive dc-to-dc trim/reference nodes for closed-loop margining |
| PDO1–PDO10 | Configurable drivers | PDO1–PDO6: selectable charge-pumped HV mode (≤14 V) or LV mode; PDO7–PDO10: LV-only push-pull/open-collector outputs |
| SDA, SCL, A0, A1 | SMBus interface | 2-wire bus with address bits set by A0/A1; open-drain pins requiring external pull-ups; supports 400 kHz operation |
| DP, DN | Remote thermal diode interface | Differential inputs for external diode temperature sensing; 200 μA current source on DP, 12 μA sink on DN |
Key Features
| Feature | Design Value |
|---|---|
| 10-input supply supervision | Simultaneous monitoring of up to 10 rails with <0.5% accuracy at 25°C and <1.0% across −40°C to +85°C |
| State-machine sequencing engine | 63-state programmable sequencer enabling conditional power-up/down, fault response, and watchdog integration without host intervention |
| Closed-loop voltage margining | Six independent DACs enable in-circuit testing at ±5% nominal supplies or dynamic regulation of dc-to-dc outputs via feedback node injection |
| Redundant self-powering | Automatic arbitration among VH and VPx rails ensures operation even if one supply fails; VDDCAP regulated to 4.75 V with minimal dropout (~0.2 V) |
| Integrated diagnostics | 12-bit ADC readback of all monitored voltages plus internal/remote temperature sensors enables real-time health assessment and logging |
Applications
| Server Power Sequencing | DSP/FPGA Board Supervision |
|---|---|
Use Scenario: Managing startup/shutdown order and fault response across 12+ voltage rails in dual-socket server motherboards with redundant PSUs. IC Role / Device Role / Timing Role: Central supervisory sequencer coordinating power delivery to CPU cores, memory, I/O, and PCIe slots using conditional state transitions. Use Value: Prevents latch-up and damage during asymmetric rail ramp-up; enables graceful shutdown on undervoltage faults detected by VH/VPx/VXx inputs. | Use Scenario: Ensuring correct power sequence and voltage tolerance compliance for Xilinx Kintex Ultrascale+ FPGAs with >8 supply domains including core, auxiliary, and transceiver rails. IC Role / Device Role / Timing Role: Real-time monitoring of VPx-supplied 1.2 V core and 0.85 V AUX rails while generating timed enable signals to PMICs via PDO1–PDO10. Use Value: Guarantees FPGA configuration integrity by enforcing minimum hold times and detecting out-of-window faults before configuration begins. |
| In-Circuit Margining Test | Central Office Line Card Monitoring |
Use Scenario: Automated production test of telecom line cards where all dc-to-dc converters must be verified at −5% and +5% nominal output under load. IC Role / Device Role / Timing Role: Closed-loop margining controller using DAC outputs to adjust converter feedback nodes while ADC verifies actual rail voltage deviation. Use Value: Eliminates external margining hardware; achieves ±0.5% margining accuracy using on-chip DACs and ADC, reducing test fixture complexity and cycle time. | Use Scenario: Continuous monitoring of 48 V backplane-derived rails (3.3 V, 5 V, 12 V) and ASIC core supplies in NEBS-compliant central office switching equipment. IC Role / Device Role / Timing Role: Fault detector and alarm generator interfacing with system management controller via SMBus; reports overvoltage on VH rail and temperature excursions via DP/DN. Use Value: Enables predictive maintenance through long-term trend analysis of rail drift and thermal rise, supported by 256-byte EEPROM logging capability. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar supervisory and sequencing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADM1066ACPZ-REEL7 | Same architecture but adds 2 extra VXx inputs (7 total), enhanced EEPROM organization, and improved DAC monotonicity (±0.5 LSB DNL) | Required when supervising >10 rails or needing tighter DAC linearity for precision margining | Select ADM1066ACPZ-REEL7 only if additional input count or sub-LSB DAC performance is mandatory; otherwise ADM1062ACPZ-REEL7 suffices for ≤10-rail systems. |
| TPS40400RHLR | TI's 6-rail sequencer with integrated 6-channel ADC but no DACs, no remote temperature sensing, and fixed 3.3 V/5 V VPx ranges only | Limited to simpler systems without closed-loop margining or wide-range VH supervision (max 6 V) | Choose TPS40400RHLR only for cost-sensitive, low-complexity designs lacking margining requirements and operating below 6 V on all monitored rails. |
Compared with ADM1066ACPZ-REEL7, ADM1062ACPZ-REEL7 trades two VXx inputs and marginal DAC linearity for lower cost and identical core sequencing, supervision, and margining functionality. Against TPS40400RHLR, ADM1062ACPZ-REEL7 delivers broader voltage range support (up to 14.4 V), closed-loop margining, and thermal diode interface-critical for high-reliability telecom and server applications.
Availability
ADM1062ACPZ-REEL7 is available at Aetrix Electronics and suitable for server power sequencing, DSP/FPGA board supervision, and in-circuit margining test applications requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for ADM1062ACPZ-REEL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The ADM1062ACPZ-REEL7 belongs to Analog Devices' Super Sequencer® family, designed specifically for intelligent power management in multivoltage systems requiring coordinated sequencing, precise margining, and comprehensive health monitoring.
FAQ
What is the primary function of the ADM1062ACPZ-REEL7 in a power system?
The ADM1062ACPZ-REEL7 serves as a configurable supervisory and sequencing controller that monitors up to 10 voltage rails, executes programmable power-up/down sequences via its state-machine sequencing engine, and performs closed-loop voltage margining using six integrated 8-bit DACs. It also provides temperature monitoring and SMBus-based system communication. This makes ADM1062ACPZ-REEL7 ideal for complex multirail systems like servers and FPGA boards where reliability and precision are critical.
Does the ADM1062ACPZ-REEL7 support both high-voltage and low-voltage programmable outputs?
Yes, the ADM1062ACPZ-REEL7 supports dual-mode outputs: PDO1–PDO6 can operate in charge-pumped high-voltage mode (up to 14 V) to drive N-FET gates, or in standard low-voltage push-pull/open-collector mode referenced to VDDCAP or VPx. PDO7–PDO10 are low-voltage only. This flexibility allows ADM1062ACPZ-REEL7 to control both power-path FETs and logic-level enable signals within the same design.
How does the ADM1062ACPZ-REEL7 achieve power supply redundancy?
The ADM1062ACPZ-REEL7 achieves redundancy by powering itself from the highest active voltage among VH or VP1–VP4 rails (minimum 3.0 V), using an internal arbitrator that behaves like five LDOs OR'd together. This ensures continued operation even if one supply fails. The VDDCAP output is regulated to ~4.75 V with only ~0.2 V dropout, allowing ADM1062ACPZ-REEL7 to remain functional down to 3.0 V on any single input rail.
Can the ADM1062ACPZ-REEL7 perform in-circuit voltage margining without external components?
Yes, ADM1062ACPZ-REEL7 implements closed-loop margining with minimal external components: its six 8-bit DACs inject precise voltage offsets into dc-to-dc converter feedback or reference nodes, while its 12-bit ADC reads back actual rail voltages to verify margining accuracy. No external DACs, op-amps, or ADCs are required-enabling production test at ±5% nominal supplies directly on the board using ADM1062ACPZ-REEL7.
What package type and pin count does the ADM1062ACPZ-REEL7 use?
The ADM1062ACPZ-REEL7 uses a 40-lead, 6 mm × 6 mm LFCSP package with an exposed pad (NC, recommended for mechanical stability). This compact, thermally efficient package is validated for high-density server and telecom PCB layouts and matches the pinout shown in Analog Devices' Rev. D datasheet Figure 3 and Table 4.
ADM1062ACPZ-REEL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- Super Sequencer®
- Package/Case:
- 40-VFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Sequencer
- Number of Voltages Monitored:
- 10
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Programmable
- Reset:
- -
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-LFCSP-VQ (6x6)
ADM1062ACPZ-REEL7 FAQ
1.How can I place an order for ADM1062ACPZ-REEL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM1062ACPZ-REEL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM1062ACPZ-REEL7 reliable?
The price and inventory of ADM1062ACPZ-REEL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1062ACPZ-REEL7 is usually 5 days.
3.What payment methods are accepted for ADM1062ACPZ-REEL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1062ACPZ-REEL7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM1062ACPZ-REEL7?
ADM1062ACPZ-REEL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM1062ACPZ-REEL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM1062ACPZ-REEL7?
For technical support, including ADM1062ACPZ-REEL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1062ACPZ-REEL7 requirements.
6.How does Aetrix verify that ADM1062ACPZ-REEL7 is sourced from the original manufacturer or authorized distributors?
All ADM1062ACPZ-REEL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1062ACPZ-REEL7 meets industry standards.
7.What is the process for return or replacement of ADM1062ACPZ-REEL7?
All ADM1062ACPZ-REEL7 units undergo pre-shipment inspection (PSI). If there is an issue with ADM1062ACPZ-REEL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM1062ACPZ-REEL7 part is unused and in its original packaging.
Return procedure for ADM1062ACPZ-REEL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADM1062ACPZ-REEL7 Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

