Analog Devices Inc. ADM1063ACPZ
- Part No.:
- ADM1063ACPZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Supervisors
- Package:
- 40-VFQFN Exposed Pad, CSP
- Datasheet:
-
ADM1063ACPZ.pdf
- Description:
- IC SUPERVISOR 10 CHANNEL 40LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:4,704
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
ADM1063ACPZ from Analog Devices is a configurable multisupply supervisor and sequencer with integrated 12-bit ADC, temperature monitoring, and programmable driver outputs. It supervises up to 10 voltage rails with <1.0% accuracy across temperature, supports supply margining on 6 rails, and delivers charge-pumped 12 V gate drive (PDO1–PDO6) for external N-FETs in power-path control. Used in DSP/FPGA supply sequencing and multivoltage line cards.
For engineers reviewing the ADM1063ACPZ datasheet, ADM1063ACPZ pinout, ADM1063ACPZ application, or ADM1063ACPZ equivalent, key selection criteria include its 10-supply fault detection capability, dual-mode PDO outputs (LV logic enable or HV FET drive), internal/external temperature sensing, SMBus-configurable sequencing engine, and support for 14.4 V high-voltage supervision with selectable input attenuators.
Technical Context
The ADM1063ACPZ implements a state-machine-based sequencing engine supporting up to 63 programmable states, enabling conditional power-up/down sequences triggered by input events (e.g., supply OK, fault, watchdog timeout). Its 12-bit SAR ADC performs round-robin conversion across VH, VPx, and VXx inputs with 0.44 ms per channel and 84 ms for full 12-channel readback with 16× averaging.
Power arbitration selects the highest valid supply among VH (3.0–14.4 V) or VPx (3.0–6.0 V) to generate a regulated 4.75 V VDDCAP output; no external regulator is needed. Five VXx pins serve as dual-function inputs-either ultralow-range (0.573–1.375 V) fault detectors or general-purpose logic inputs-with 1 MΩ impedance and programmable glitch filtering (0–100 μs).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Supervision Accuracy | ±1.0% across −40°C to +85°C - ensures reliable undervoltage/overvoltage detection without recalibration |
| ADC Resolution & Range | 12-bit SAR, 0 to VREFIN (2.048 V) - enables precise readback of 12 supervised voltages with 0.125°C temperature resolution |
| Programmable Outputs | 10 PDOs: 6 with charge-pumped HV mode (up to 14 V, 20 μA avg), 4 LV-only - supports both logic-level enables and N-FET gate driving |
| Temperature Sensing | 1 internal + 2 remote diode sensors - monitors local die temp and two external components (e.g., CPU, FPGA) simultaneously |
| Input Voltage Ranges | VH: 6–14.4 V (high range); VPx: 1.25–6 V (3 ranges); VXx: 0.573–1.375 V - covers core, I/O, and auxiliary rails without external dividers |
| SMBus Interface | 400 kHz compliant, 2-wire - allows configuration, real-time monitoring, and firmware updates without dedicated debug hardware |
| Sequencing Engine States | 63 programmable states - enables complex conditional sequencing (e.g., delay-on-fail, retry-on-timeout, interrupt-on-warning) |
Pinout & Package
ADM1063ACPZ is packaged in a 40-lead, 6 mm × 6 mm LFCSP with exposed pad (NC, recommended for mechanical stability). Pin functions are validated per Analog Devices Rev. D datasheet Figures 3 and Table 4.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VH | High-voltage supply input & fault detector | Accepts 3.0–14.4 V; powers device and monitors backplane or 12 V rails with selectable attenuation |
| VP1–VP4 | Low-voltage supply inputs & fault detectors | Each supports 3 ranges (e.g., 1.25–3.0 V for core rails, 2.5–6.0 V for I/O) via internal attenuators |
| VX1–VX5 | Dual-function inputs | Ultralow-threshold (0.573–1.375 V) fault detection OR general-purpose digital inputs (1 MΩ impedance) |
| PDO1–PDO6 | Configurable driver outputs | Charge-pumped HV mode drives N-FET gates; LV mode provides push-pull or open-collector logic enables |
| PDO7–PDO10 | Logic-level driver outputs | Push-pull or open-collector only (no charge pump); suitable for enable signals and reset controls |
| SDA/SCL | SMBus interface | Bidirectional open-drain pins requiring external pull-ups; support full register access and EEPROM programming |
| D1P/D1N, D2P/D2N | Remote temperature sensor interfaces | Differential inputs for two external thermal diodes (e.g., CPU/GPU package diodes) |
| REFOUT/REFIN | ADC reference circuit | 2.048 V ±0.25% internal reference; REFIN accepts external reference for improved ADC gain accuracy |
Key Features
| Feature | Design Value |
|---|---|
| 10-supply supervision with <1.0% accuracy | Eliminates need for external comparators and precision resistors; reduces BOM count and layout area |
| Integrated 12-bit ADC with round-robin scanning | Enables real-time voltage margining and telemetry without host processor intervention |
| Charge-pumped HV outputs (PDO1–PDO6) | Drives N-FET gates directly at up to 14 V, removing need for discrete level shifters or gate drivers |
| 63-state sequencing engine | Supports fault-handling logic (e.g., hold sequence on UV, restart after timeout) without external microcontroller |
| Internal EEPROM (256 bytes) | Stores full configuration (fault thresholds, sequences, margins) for autonomous operation at power-up |
| Triple temperature sensing (1 local + 2 remote) | Monitors system thermal health at critical points using standard thermal diodes, not thermistors |
Applications
| Server Power Sequencing | DSP/FPGA Board Startup |
|---|---|
Use Scenario: Coordinating power-up order of CPU, memory, and I/O rails in 1U rack servers with redundant 12 V backplanes. IC Role / Device Role / Timing Role: Central sequencing supervisor that asserts enables only after all 10 rails meet tolerance, then triggers watchdog timer for post-power validation. Use Value: Prevents latch-up and boot failure by enforcing strict timing windows (e.g., 100 ms delay between VCCINT and VCCIO) and detecting marginal supplies before firmware loads. |
Use Scenario: Managing startup of Xilinx Kintex-7 FPGA with 5 distinct supply domains (VCCINT, VCCAUX, VCCO, etc.) and associated transceivers. IC Role / Device Role / Timing Role: Configurable sequencer executing multi-stage ramp-up with voltage margining verification at each stage via ADC readback. Use Value: Ensures FPGA configuration completes successfully by validating rail stability before releasing PROGRAM_B, reducing field returns due to partial configuration errors. |
| Multivoltage Line Card Monitoring | In-Circuit Supply Margining Test |
Use Scenario: Real-time supervision of analog front-end, digital processing, and RF section supplies on telecom line cards operating in central office environments. IC Role / Device Role / Timing Role: Fault detector and telemetry hub reporting over SMBus to shelf controller; triggers PDO-driven shutdown of affected sections during overvoltage events. Use Value: Enables hot-swap-safe operation by isolating faulty sections without resetting entire card, meeting NEBS Level 3 reliability requirements. |
Use Scenario: Automated production test of power supply tolerance margins using closed-loop feedback from ADM1063ACPZ ADC readings. IC Role / Device Role / Timing Role: Margining controller adjusting DAC outputs to perturb rail voltages while continuously verifying compliance via ADC and fault detectors. Use Value: Replaces manual bench testing with deterministic, repeatable margin validation across 6 rails in <5 seconds per unit, improving test throughput. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar multisupply supervisory and sequencing applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ADM1168ACPZ | 8-supply supervision, no charge-pump HV outputs, integrated DAC for margining (vs. external DAC required for ADM1063ACPZ) | Lacks 12 V gate drive capability; limited to logic-level enables only | Select when system uses only push-pull enables and requires built-in DAC-based margining instead of external DAC control |
| TPS40422RTWR | 2-phase PWM controller with integrated sequencing logic; no ADC, no temperature sensing, no SMBus | Designed for DC/DC converter control-not standalone supervision; requires external MCU for complex sequencing | Select when primary need is synchronized phase control of buck converters, not autonomous multi-rail monitoring |
Compared with ADM1168ACPZ and TPS40422RTWR, the ADM1063ACPZ uniquely combines 10-supply supervision, charge-pumped HV outputs for N-FET control, 12-bit ADC telemetry, and triple temperature sensing in a single SMBus-configurable IC-enabling fully autonomous, self-validating power management without external processors or discrete support components.
Availability
ADM1063ACPZ is available at Aetrix Electronics and suitable for server/routers, DSP/FPGA supply sequencing, and multivoltage system line cards requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.
Supply support for ADM1063ACPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision measurement and control systems.
The ADM1063ACPZ belongs to Analog Devices' Power Management & Supervisory IC product line, designed specifically for autonomous, high-accuracy power sequencing and telemetry in complex multirail systems such as servers, telecom infrastructure, and programmable logic platforms.
FAQ
What is the maximum input voltage supported by the ADM1063ACPZ VH pin?
The ADM1063ACPZ VH pin supports up to 14.4 V in high-range mode, with absolute maximum rating of 16 V. This allows direct connection to 12 V backplane supplies while maintaining accurate fault detection down to ±1.0% across temperature. Operation above 14.4 V violates specification and may compromise accuracy or reliability of the ADM1063ACPZ.
Does the ADM1063ACPZ require an external reference for optimal ADC performance?
The ADM1063ACPZ includes an internal 2.048 V ±0.25% REFOUT pin that can be connected directly to REFIN for standard operation. However, for applications demanding higher ADC gain accuracy (e.g., precision margining), an external low-noise reference driving REFIN is supported and improves gain error specification from ±0.05% to match the external reference's tolerance. The ADM1063ACPZ functions correctly with either source.
How many temperature sensors does the ADM1063ACPZ integrate, and what types are they?
The ADM1063ACPZ integrates one internal diode-based temperature sensor and supports two external thermal diodes via differential D1P/D1N and D2P/D2N pins. All three sensors are read by the same 12-bit ADC, providing simultaneous local die temperature and remote component monitoring with ±3°C accuracy. This architecture eliminates need for separate thermal ICs in the ADM1063ACPZ design.
Can the ADM1063ACPZ drive N-channel MOSFETs directly, and which pins support this?
Yes, the ADM1063ACPZ can directly drive N-channel MOSFET gates using its charge-pumped high-voltage outputs. PDO1 through PDO6 feature an internal charge pump delivering up to 14 V at 20 μA average current-sufficient to fully enhance common logic-level N-FETs in power-path control. PDO7–PDO10 lack this capability and are limited to LV logic signaling, making PDO1–PDO6 the designated pins for FET gate drive in the ADM1063ACPZ.
What package options are available for the ADM1063ACPZ, and is the exposed pad electrically connected?
The ADM1063ACPZ is offered in a 40-lead, 6 mm × 6 mm LFCSP package (ACPZ suffix). The exposed pad on the bottom is a no-connect (NC) terminal-electrically isolated from all internal circuits-but should be soldered to the PCB ground plane for mechanical stability and thermal dissipation. This differs from some other LFCSP devices where the pad is VSS-connected; for the ADM1063ACPZ, it remains floating per Analog Devices datasheet Rev. D.
ADM1063ACPZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- Super Sequencer®
- Package/Case:
- 40-VFQFN Exposed Pad, CSP
- Packaging:
- Tray
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Sequencer
- Number of Voltages Monitored:
- 10
- Voltage - Threshold:
- Adjustable/Selectable
- Output:
- Programmable
- Reset:
- -
- Reset Timeout:
- -
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-LFCSP-VQ (6x6)
ADM1063ACPZ FAQ
1.How can I place an order for ADM1063ACPZ through Aetrix?
Please submit a Request for Quotation (RFQ) for ADM1063ACPZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for ADM1063ACPZ reliable?
The price and inventory of ADM1063ACPZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for ADM1063ACPZ is usually 5 days.
3.What payment methods are accepted for ADM1063ACPZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for ADM1063ACPZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for ADM1063ACPZ?
ADM1063ACPZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your ADM1063ACPZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for ADM1063ACPZ?
For technical support, including ADM1063ACPZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your ADM1063ACPZ requirements.
6.How does Aetrix verify that ADM1063ACPZ is sourced from the original manufacturer or authorized distributors?
All ADM1063ACPZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that ADM1063ACPZ meets industry standards.
7.What is the process for return or replacement of ADM1063ACPZ?
All ADM1063ACPZ units undergo pre-shipment inspection (PSI). If there is an issue with ADM1063ACPZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The ADM1063ACPZ part is unused and in its original packaging.
Return procedure for ADM1063ACPZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
ADM1063ACPZ Tags

-
MIC826SYMT-TR
Microchip Technology

-
APX803S-31SA-7
Diodes Incorporated

-
APX803L20-29SA-7
Diodes Incorporated
-
TPS3828-33DBVR
Texas Instruments

-
V6340RSP3B+
EM Microelectronic

-
EM6325CXSP5B-2.9+
EM Microelectronic

-
MCP120T-300I/TT
Microchip Technology

-
MCP130T-315I/TT
Microchip Technology

-
MCP120T-475I/TT
Microchip Technology

-
MCP111T-300E/TT
Microchip Technology

-
MCP120T-315I/TT
Microchip Technology

-
MCP809T-315I/TT
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

